MISC_REG_AEU_MASK_ATTN_IGU
#define MISC_REG_AEU_MASK_ATTN_IGU 0x008494UL //Access:RW DataWidth:0x8 // [7:0] = mask 8 attention output signals toward IGU; 0 = mask; 1 = unmask.
#define MISC_REG_AEU_MASK_ATTN_IGU 0x008494UL //Access:RW DataWidth:0x8 [7:0] = mask 8 attention output signals toward IGU; 0 = mask; 1 = unmask. Chips: BB_A0 BB_B0 K2
#define MISC_REG_AEU_MASK_ATTN_IGU 0x008494UL //Access:RW DataWidth:0x8 // [7:0] = mask 8 attention output signals toward IGU; 0 = mask; 1 = unmask.
#define MISC_REG_AEU_MASK_ATTN_IGU 0x008494UL //Access:RW DataWidth:0x8 // [7:0] = mask 8 attention output signals toward IGU; 0 = mask; 1 = unmask.
#define MISC_REG_AEU_MASK_ATTN_IGU 0x008494UL //Access:RW DataWidth:0x8 // [7:0] = mask 8 attention output signals toward IGU; 0 = mask; 1 = unmask.