Symbol: MCP_REG_SCRATCH
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
65946
#define MCP_REG_SCRATCH 0xe20000UL //Access:RW DataWidth:0x20 // This is the supported processor scratch pad space that is visible at 0x0 by the processor. This can be modified at any time and may be used for processor-to-processor communication.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
60339
#define MCP_REG_SCRATCH 0xe20000UL //Access:RW DataWidth:0x20 This is the supported processor scratch pad space that is visible at 0x0 by the processor. This can be modified at any time and may be used for processor-to-processor communication. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
63728
#define MCP_REG_SCRATCH 0xe20000UL //Access:RW DataWidth:0x20 // This is the supported processor scratch pad space that is visible at 0x0 by the processor. This can be modified at any time and may be used for processor-to-processor communication.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
63728
#define MCP_REG_SCRATCH 0xe20000UL //Access:RW DataWidth:0x20 // This is the supported processor scratch pad space that is visible at 0x0 by the processor. This can be modified at any time and may be used for processor-to-processor communication.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
63728
#define MCP_REG_SCRATCH 0xe20000UL //Access:RW DataWidth:0x20 // This is the supported processor scratch pad space that is visible at 0x0 by the processor. This can be modified at any time and may be used for processor-to-processor communication.