MCP_REG_CPU_STATE
#define MCP_REG_CPU_STATE 0xe05004UL //Access:RW DataWidth:0x20 // Multi Field Register.
#define MCP_REG_CPU_STATE 0xe05004UL //Access:RW DataWidth:0x20 Multi Field Register. Chips: BB_A0 BB_B0 K2
#define MCP_REG_CPU_STATE 0xe05004UL //Access:RW DataWidth:0x20 // Multi Field Register.
#define MCP_REG_CPU_STATE 0xe05004UL //Access:RW DataWidth:0x20 // Multi Field Register.
#define MCP_REG_CPU_STATE 0xe05004UL //Access:RW DataWidth:0x20 // Multi Field Register.