MCP_REG_CPU_REG_FILE
#define MCP_REG_CPU_REG_FILE 0xe05200UL //Access:RW DataWidth:0x20 // While the processor is halted, the general purpose processor registers (r0-r31) can be read and written through these register locations.
#define MCP_REG_CPU_REG_FILE 0xe05200UL //Access:RW DataWidth:0x20 While the processor is halted, the general purpose processor registers (r0-r31) can be read and written through these register locations. Chips: BB_A0 BB_B0 K2
#define MCP_REG_CPU_REG_FILE 0xe05200UL //Access:RW DataWidth:0x20 // While the processor is halted, the general purpose processor registers (r0-r31) can be read and written through these register locations.
#define MCP_REG_CPU_REG_FILE 0xe05200UL //Access:RW DataWidth:0x20 // While the processor is halted, the general purpose processor registers (r0-r31) can be read and written through these register locations.
#define MCP_REG_CPU_REG_FILE 0xe05200UL //Access:RW DataWidth:0x20 // While the processor is halted, the general purpose processor registers (r0-r31) can be read and written through these register locations.