MCP_REG_CPU_EVENT_MASK
#define MCP_REG_CPU_EVENT_MASK 0xe05008UL //Access:RW DataWidth:0x20 // This register provides one bit for each state register bit to enable it into the equation for generation the TX Processor Attention output. The reset value of 1 masks all halt conditions from generating an attention.
#define MCP_REG_CPU_EVENT_MASK 0xe05008UL //Access:RW DataWidth:0x20 This register provides one bit for each state register bit to enable it into the equation for generation the TX Processor Attention output. The reset value of 1 masks all halt conditions from generating an attention. Chips: BB_A0 BB_B0 K2
#define MCP_REG_CPU_EVENT_MASK 0xe05008UL //Access:RW DataWidth:0x20 // This register provides one bit for each state register bit to enable it into the equation for generation the TX Processor Attention output. The reset value of 1 masks all halt conditions from generating an attention.
#define MCP_REG_CPU_EVENT_MASK 0xe05008UL //Access:RW DataWidth:0x20 // This register provides one bit for each state register bit to enable it into the equation for generation the TX Processor Attention output. The reset value of 1 masks all halt conditions from generating an attention.
#define MCP_REG_CPU_EVENT_MASK 0xe05008UL //Access:RW DataWidth:0x20 // This register provides one bit for each state register bit to enable it into the equation for generation the TX Processor Attention output. The reset value of 1 masks all halt conditions from generating an attention.