IGU_REG_WRITE_DONE_PENDING
#define IGU_REG_WRITE_DONE_PENDING 0x130480UL //ACCESS:WB_R DataWidth:0x20 Description: Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. Data valid only in addresses 0-4. all the rest are zero.
#define IGU_REG_WRITE_DONE_PENDING 0x180900UL //Access:R DataWidth:0x20 // Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. The array size is 16 rows of 32 bits each (16 * 32bits = 512 SBs).
#define IGU_REG_WRITE_DONE_PENDING 0x180900UL //Access:R DataWidth:0x20 Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. In BB an array of 9 rows is applicable (9 * 32bits = 288 SBs). In K2 an array of 12 rows is applicable, in the last row only the first 16 bits are applicable (11.5 * 32bits = 368 SBs). Chips: BB_A0 BB_B0 K2
#define IGU_REG_WRITE_DONE_PENDING 0x180900UL //Access:R DataWidth:0x20 // Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. In BB an array of 9 rows is applicable (9 * 32bits = 288 SBs). In K2 an array of 12 rows is applicable, in the last row only the first 16 bits are applicable (11.5 * 32bits = 368 SBs).
#define IGU_REG_WRITE_DONE_PENDING 0x180900UL //Access:R DataWidth:0x20 // Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. In BB an array of 9 rows is applicable (9 * 32bits = 288 SBs). In K2 an array of 12 rows is applicable, in the last row only the first 16 bits are applicable (11.5 * 32bits = 368 SBs).
#define IGU_REG_WRITE_DONE_PENDING 0x180900UL //Access:R DataWidth:0x20 // Each bit represent write done pending bits status for that SB (MSI/MSIX message was sent and write done was not received yet). 0 = clear; 1 = set. In BB an array of 9 rows is applicable (9 * 32bits = 288 SBs). In K2 an array of 12 rows is applicable, in the last row only the first 16 bits are applicable (11.5 * 32bits = 368 SBs).