IGU_REG_PCI_VF_MSIX_FUNC_MASK
#define IGU_REG_PCI_VF_MSIX_FUNC_MASK 0x130150UL //ACCESS:RW DataWidth:0x1 SPLIT:64 Description: VF MSIX function mask status shadow of PCI config register. 0 - unmasked; 1 - masked
#define IGU_REG_PCI_VF_MSIX_FUNC_MASK 0x18081cUL //Access:RW DataWidth:0x1 VF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked. Chips: BB_A0 BB_B0
#define IGU_REG_PCI_VF_MSIX_FUNC_MASK 0x18081cUL //Access:RW DataWidth:0x1 // VF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.
#define IGU_REG_PCI_VF_MSIX_FUNC_MASK 0x18081cUL //Access:RW DataWidth:0x1 // VF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.
#define IGU_REG_PCI_VF_MSIX_FUNC_MASK 0x18081cUL //Access:RW DataWidth:0x1 // VF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.