IGU_REG_PCI_PF_MSIX_FUNC_MASK
#define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x130148UL //ACCESS:RW DataWidth:0x1 SPLIT:8 Description: PF MSIX function mask status. shadow of PCI config register. 0 - unmasked; 1 - masked
#define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x180814UL //Access:RW DataWidth:0x1 PF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked. Chips: BB_A0 BB_B0
#define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x180814UL //Access:RW DataWidth:0x1 // PF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.
#define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x180814UL //Access:RW DataWidth:0x1 // PF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.
#define IGU_REG_PCI_PF_MSIX_FUNC_MASK 0x180814UL //Access:RW DataWidth:0x1 // PF MSIX function mask status. Shadow of PCI config register. 0 - unmasked; 1 - masked.