IGU_REG_PCI_PF_MSIX_EN
#define IGU_REG_PCI_PF_MSIX_EN 0x130144UL //ACCESS:RW DataWidth:0x1 SPLIT:8 Description: PF MSIX enable status. shadow of PCI config register
#define IGU_REG_PCI_PF_MSIX_EN 0x180810UL //Access:RW DataWidth:0x1 PF MSIX enable status. Shadow of PCI config register. Chips: BB_A0 BB_B0
#define IGU_REG_PCI_PF_MSIX_EN 0x180810UL //Access:RW DataWidth:0x1 // PF MSIX enable status. Shadow of PCI config register.
#define IGU_REG_PCI_PF_MSIX_EN 0x180810UL //Access:RW DataWidth:0x1 // PF MSIX enable status. Shadow of PCI config register.
#define IGU_REG_PCI_PF_MSIX_EN 0x180810UL //Access:RW DataWidth:0x1 // PF MSIX enable status. Shadow of PCI config register.