IGU_REG_BLOCK_CONFIGURATION
#define IGU_REG_BLOCK_CONFIGURATION 0x130000UL //ACCESS:RW DataWidth:0x5 Multi Field Register
#define IGU_REG_BLOCK_CONFIGURATION 0x180040UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define IGU_REG_BLOCK_CONFIGURATION 0x180040UL //Access:RW DataWidth:0x3 Multi Field Register. Chips: BB_A0 BB_B0 K2
#define IGU_REG_BLOCK_CONFIGURATION 0x180040UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define IGU_REG_BLOCK_CONFIGURATION 0x180040UL //Access:RW DataWidth:0x3 // Multi Field Register.
#define IGU_REG_BLOCK_CONFIGURATION 0x180040UL //Access:RW DataWidth:0x3 // Multi Field Register.