IGU_REG_ATTN_FSM
#define IGU_REG_ATTN_FSM 0x130054UL //ACCESS:R DataWidth:0x4 Description: Debug: attn_fsm
#define IGU_REG_ATTN_FSM 0x181544UL //Access:R DataWidth:0x4 // Debug: attn_fsm.
#define IGU_REG_ATTN_FSM 0x181544UL //Access:R DataWidth:0x4 Debug: attn_fsm. Chips: BB_A0 BB_B0 K2
#define IGU_REG_ATTN_FSM 0x181544UL //Access:R DataWidth:0x4 // Debug: attn_fsm.
#define IGU_REG_ATTN_FSM 0x181544UL //Access:R DataWidth:0x4 // Debug: attn_fsm.
#define IGU_REG_ATTN_FSM 0x181544UL //Access:R DataWidth:0x4 // Debug: attn_fsm.