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HV_DRAM_CTL0
usr/src/uts/sun4v/sys/niagara2regs.h
157
#define HV_DRAM_CTL0 0x1
usr/src/uts/sun4v/sys/niagara2regs.h
176
#define HV_DRAM_CTL0 0x2
usr/src/uts/sun4v/sys/niagara2regs.h
208
#define HV_DRAM_CTL0 0x2
usr/src/uts/sun4v/sys/niagararegs.h
100
#define HV_DRAM_CTL0 0x2
