GRC_REG_TRACE_FIFO_VALID_DATA
#define GRC_REG_TRACE_FIFO_VALID_DATA 0x050064UL //Access:R DataWidth:0x1 // If = 1, indicates that the trace FIFO contains at least one valid data. If = 0, indicates that the trace FIFO doeasn't contain any valid data. This register should be read before reading the GRC_REGISTERS_TRACE_FIFO, and only if the read value is 1, one read from the GRC_REGISTERS_TRACE_FIFO can be done.
#define GRC_REG_TRACE_FIFO_VALID_DATA 0x050064UL //Access:R DataWidth:0x1 If = 1, indicates that the trace FIFO contains at least one valid data. If = 0, indicates that the trace FIFO doeasn't contain any valid data. This register should be read before reading the GRC_REGISTERS_TRACE_FIFO, and only if the read value is 1, one read from the GRC_REGISTERS_TRACE_FIFO can be done. Chips: BB_A0 BB_B0 K2
#define GRC_REG_TRACE_FIFO_VALID_DATA 0x050064UL //Access:R DataWidth:0x1 // If = 1, indicates that the trace FIFO contains at least one valid data. If = 0, indicates that the trace FIFO doeasn't contain any valid data. This register should be read before reading the GRC_REGISTERS_TRACE_FIFO, and only if the read value is 1, one read from the GRC_REGISTERS_TRACE_FIFO can be done.
#define GRC_REG_TRACE_FIFO_VALID_DATA 0x050064UL //Access:R DataWidth:0x1 // If = 1, indicates that the trace FIFO contains at least one valid data. If = 0, indicates that the trace FIFO doeasn't contain any valid data. This register should be read before reading the GRC_REGISTERS_TRACE_FIFO, and only if the read value is 1, one read from the GRC_REGISTERS_TRACE_FIFO can be done.
#define GRC_REG_TRACE_FIFO_VALID_DATA 0x050064UL //Access:R DataWidth:0x1 // If = 1, indicates that the trace FIFO contains at least one valid data. If = 0, indicates that the trace FIFO doeasn't contain any valid data. This register should be read before reading the GRC_REGISTERS_TRACE_FIFO, and only if the read value is 1, one read from the GRC_REGISTERS_TRACE_FIFO can be done.