Symbol: GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
36552
#define GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW 0x05040cUL //Access:RW DataWidth:0x5 // Number of valid windows in the GRC_REG_PROTECTION_OVERRIDE_WINDOW memory. The number can be from 0 (no valid window) to 20 (20 valid windows). The valid windows should be consecutive. Each valid window can be applicable for rd access, wr access, or both.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
33175
#define GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW 0x05040cUL //Access:RW DataWidth:0x5 Number of valid windows in the GRC_REG_PROTECTION_OVERRIDE_WINDOW memory. The number can be from 0 (no valid window) to 20 (20 valid windows). The valid windows should be consecutive. Each valid window can be applicable for rd access, wr access, or both. Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
36496
#define GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW 0x05040cUL //Access:RW DataWidth:0x5 // Number of valid windows in the GRC_REG_PROTECTION_OVERRIDE_WINDOW memory. The number can be from 0 (no valid window) to 20 (20 valid windows). The valid windows should be consecutive. Each valid window can be applicable for rd access, wr access, or both.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
36496
#define GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW 0x05040cUL //Access:RW DataWidth:0x5 // Number of valid windows in the GRC_REG_PROTECTION_OVERRIDE_WINDOW memory. The number can be from 0 (no valid window) to 20 (20 valid windows). The valid windows should be consecutive. Each valid window can be applicable for rd access, wr access, or both.
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
36496
#define GRC_REG_NUMBER_VALID_OVERRIDE_WINDOW 0x05040cUL //Access:RW DataWidth:0x5 // Number of valid windows in the GRC_REG_PROTECTION_OVERRIDE_WINDOW memory. The number can be from 0 (no valid window) to 20 (20 valid windows). The valid windows should be consecutive. Each valid window can be applicable for rd access, wr access, or both.