Symbol: GRC_REG_DBG_SHIFT
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr.h
36490
#define GRC_REG_DBG_SHIFT 0x0500acUL //Access:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qword (256bit line) right shifting of the selected line (after the masking).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_ah_compile15.h
33104
#define GRC_REG_DBG_SHIFT 0x0500acUL //Access:RW DataWidth:0x2 DBMUX register. Circular dword (128bit line) / qword (256bit line) right shifting of the selected line (after the masking). Chips: BB_A0 BB_B0 K2
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_bb.h
36434
#define GRC_REG_DBG_SHIFT 0x0500acUL //Access:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qword (256bit line) right shifting of the selected line (after the masking).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_e5.h
36434
#define GRC_REG_DBG_SHIFT 0x0500acUL //Access:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qword (256bit line) right shifting of the selected line (after the masking).
usr/src/uts/common/io/qede/579xx/hsi/hw/reg_addr_k2.h
36434
#define GRC_REG_DBG_SHIFT 0x0500acUL //Access:RW DataWidth:0x2 // DBMUX register. Circular dword (128bit line) / qword (256bit line) right shifting of the selected line (after the masking).