#include "asm_defs.h"
#include "asm_offsets.h"
#define MSR_EXCEPTIONS_ENABLED 15
.text
FUNCTION(reboot):
b .
FUNCTION_END(reboot)
FUNCTION(arch_int_enable_interrupts):
mfmsr %r3
li %r4, 1
insrwi %r3, %r4, 1, 31 - MSR_EXCEPTIONS_ENABLED
mtmsr %r3
isync
blr
FUNCTION_END(arch_int_enable_interrupts)
FUNCTION(arch_int_disable_interrupts):
mfmsr %r4
mr %r3, %r4
rlwinm %r4, %r4, 0, 32 - MSR_EXCEPTIONS_ENABLED, 30 - MSR_EXCEPTIONS_ENABLED
mtmsr %r4
isync
blr
FUNCTION_END(arch_int_disable_interrupts)
FUNCTION(arch_int_restore_interrupts):
mfmsr %r4
rlwimi %r4, %r3, 0, 31 - MSR_EXCEPTIONS_ENABLED, 31 - MSR_EXCEPTIONS_ENABLED
mtmsr %r4
isync
blr
FUNCTION_END(arch_int_restore_interrupts)
FUNCTION(arch_int_are_interrupts_enabled):
mfmsr %r3
extrwi %r3, %r3, 1, 31 - MSR_EXCEPTIONS_ENABLED
blr
FUNCTION_END(arch_int_are_interrupts_enabled)
FUNCTION(dbg_save_registers):
blr
FUNCTION_END(dbg_save_registers)
FUNCTION(get_time_base):
1:
mftbu %r3
mftb %r4
mftbu %r5
cmpw %r5, %r3
bne- 1b
blr
FUNCTION_END(get_time_base)
FUNCTION(getibats):
mfibatu %r0,0
stw %r0,0(%r3)
mfibatl %r0,0
stwu %r0,4(%r3)
mfibatu %r0,1
stwu %r0,4(%r3)
mfibatl %r0,1
stwu %r0,4(%r3)
mfibatu %r0,2
stwu %r0,4(%r3)
mfibatl %r0,2
stwu %r0,4(%r3)
mfibatu %r0,3
stwu %r0,4(%r3)
mfibatl %r0,3
stwu %r0,4(%r3)
blr
FUNCTION_END(getibats)
FUNCTION(setibats):
lwz %r0,0(%r3)
mtibatu 0,%r0
isync
lwzu %r0,4(%r3)
mtibatl 0,%r0
isync
lwzu %r0,4(%r3)
mtibatu 1,%r0
isync
lwzu %r0,4(%r3)
mtibatl 1,%r0
isync
lwzu %r0,4(%r3)
mtibatu 2,%r0
isync
lwzu %r0,4(%r3)
mtibatl 2,%r0
isync
lwzu %r0,4(%r3)
mtibatu 3,%r0
isync
lwzu %r0,4(%r3)
mtibatl 3,%r0
isync
blr
FUNCTION_END(setibats)
FUNCTION(getdbats):
mfdbatu %r0,0
stw %r0,0(%r3)
mfdbatl %r0,0
stwu %r0,4(%r3)
mfdbatu %r0,1
stwu %r0,4(%r3)
mfdbatl %r0,1
stwu %r0,4(%r3)
mfdbatu %r0,2
stwu %r0,4(%r3)
mfdbatl %r0,2
stwu %r0,4(%r3)
mfdbatu %r0,3
stwu %r0,4(%r3)
mfdbatl %r0,3
stwu %r0,4(%r3)
blr
FUNCTION_END(getdbats)
FUNCTION(setdbats):
lwz %r0,0(%r3)
mtdbatu 0,%r0
lwzu %r0,4(%r3)
mtdbatl 0,%r0
lwzu %r0,4(%r3)
mtdbatu 1,%r0
lwzu %r0,4(%r3)
mtdbatl 1,%r0
lwzu %r0,4(%r3)
mtdbatu 2,%r0
lwzu %r0,4(%r3)
mtdbatl 2,%r0
lwzu %r0,4(%r3)
mtdbatu 3,%r0
lwzu %r0,4(%r3)
mtdbatl 3,%r0
sync
blr
FUNCTION_END(setdbats)
FUNCTION(gethid0):
mfspr %r3, 1008
blr
FUNCTION_END(gethid0)
FUNCTION(sethid0):
isync
mtspr 1008, %r3
isync
blr
FUNCTION_END(sethid0)
FUNCTION(getl2cr):
mfspr %r3, 1017
blr
FUNCTION_END(getl2cr)
FUNCTION(setl2cr):
isync
mtspr 1017, %r3
isync
blr
FUNCTION_END(setl2cr)
FUNCTION(ppc_context_switch):
stfdu %f31, -8(%r1)
stfdu %f30, -8(%r1)
stfdu %f29, -8(%r1)
stfdu %f28, -8(%r1)
stfdu %f27, -8(%r1)
stfdu %f26, -8(%r1)
stfdu %f25, -8(%r1)
stfdu %f24, -8(%r1)
stfdu %f23, -8(%r1)
stfdu %f22, -8(%r1)
stfdu %f21, -8(%r1)
stfdu %f20, -8(%r1)
stfdu %f19, -8(%r1)
stfdu %f18, -8(%r1)
stfdu %f17, -8(%r1)
stfdu %f16, -8(%r1)
stfdu %f15, -8(%r1)
stfdu %f14, -8(%r1)
stfdu %f13, -8(%r1)
stwu %r31, -4(%r1)
stwu %r30, -4(%r1)
stwu %r29, -4(%r1)
stwu %r28, -4(%r1)
stwu %r27, -4(%r1)
stwu %r26, -4(%r1)
stwu %r25, -4(%r1)
stwu %r24, -4(%r1)
stwu %r23, -4(%r1)
stwu %r22, -4(%r1)
stwu %r21, -4(%r1)
stwu %r20, -4(%r1)
stwu %r19, -4(%r1)
stwu %r18, -4(%r1)
stwu %r17, -4(%r1)
stwu %r16, -4(%r1)
stwu %r15, -4(%r1)
stwu %r14, -4(%r1)
stwu %r13, -4(%r1)
stwu %r2, -4(%r1)
mfcr %r0
stwu %r0, -4(%r1)
mflr %r0
stwu %r0, -4(%r1)
stwu %r1, 0(%r3)
mr %r1, %r4
lwz %r0, 0(%r1)
mtlr %r0
lwzu %r0, 4(%r1)
mtcr %r0
lwzu %r2, 4(%r1)
lwzu %r13, 4(%r1)
lwzu %r14, 4(%r1)
lwzu %r15, 4(%r1)
lwzu %r16, 4(%r1)
lwzu %r17, 4(%r1)
lwzu %r18, 4(%r1)
lwzu %r19, 4(%r1)
lwzu %r20, 4(%r1)
lwzu %r21, 4(%r1)
lwzu %r22, 4(%r1)
lwzu %r23, 4(%r1)
lwzu %r24, 4(%r1)
lwzu %r25, 4(%r1)
lwzu %r26, 4(%r1)
lwzu %r27, 4(%r1)
lwzu %r28, 4(%r1)
lwzu %r29, 4(%r1)
lwzu %r30, 4(%r1)
lwzu %r31, 4(%r1)
lfdu %f13, 4(%r1)
lfdu %f14, 8(%r1)
lfdu %f15, 8(%r1)
lfdu %f16, 8(%r1)
lfdu %f17, 8(%r1)
lfdu %f18, 8(%r1)
lfdu %f19, 8(%r1)
lfdu %f20, 8(%r1)
lfdu %f21, 8(%r1)
lfdu %f22, 8(%r1)
lfdu %f23, 8(%r1)
lfdu %f24, 8(%r1)
lfdu %f25, 8(%r1)
lfdu %f26, 8(%r1)
lfdu %f27, 8(%r1)
lfdu %f28, 8(%r1)
lfdu %f29, 8(%r1)
lfdu %f30, 8(%r1)
lfdu %f31, 8(%r1)
addi %r1, %r1, 8
blr
FUNCTION_END(ppc_context_switch)
FUNCTION(ppc_kernel_thread_root):
mtlr %r13
blrl
mtlr %r14
blrl
mtlr %r15
blrl
li %r3, 0
b kernel_debugger
FUNCTION_END(ppc_kernel_thread_root)
FUNCTION(arch_debug_call_with_fault_handler):
mflr %r0
stw %r0, 4(%r1)
stwu %r1, -16(%r1)
stw %r4, 8(%r1)
stw %r1, CPU_ENT_fault_handler_stack_pointer(%r3)
lis %r11, 1f@ha
ori %r11, %r11, 1f@l
stw %r11, CPU_ENT_fault_handler(%r3)
mr %r3, %r6
mtlr %r5
blrl
lwz %r0, 16 + 4(%r1)
mtlr %r0
addi %r1, %r1, 16
blr
1:
lwz %r3, 8(%r1)
li %r4, 1
lis %r0, longjmp@ha
ori %r0, %r0, longjmp@l
mtlr %r0
blr
FUNCTION_END(arch_debug_call_with_fault_handler)
FUNCTION(_arch_cpu_user_memcpy):
blr
FUNCTION_END(_arch_cpu_user_memcpy)
FUNCTION(_arch_cpu_user_memset):
blr
FUNCTION_END(_arch_cpu_user_memset)
FUNCTION(_arch_cpu_user_strlcpy):
blr
FUNCTION_END(_arch_cpu_user_strlcpy)