_FPUSW_SHIFT
__new_fpsr = __old_fpsr | (__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT;
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
__new_fpsr = __old_fpsr & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
return ((__old_fpsr >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
return ((__fpsr & _ENABLE_MASK) >> _FPUSW_SHIFT);
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
__new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
__new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
__r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT;
return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
__r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT);
return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT);
FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT)
__new_r = __old_r | ((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
__new_r = __old_r & ~((__mask & FE_ALL_EXCEPT) << _FPUSW_SHIFT);
return ((__old_r >> _FPUSW_SHIFT) & FE_ALL_EXCEPT);
return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)