WriteRunReg32
WriteRunReg32(XHCI_IMAN(0), temp);
WriteRunReg32(XHCI_ERDP_LO(0), (uint32)addr | ERDP_BUSY);
WriteRunReg32(XHCI_ERDP_HI(0), (uint32)(addr >> 32));
WriteRunReg32(XHCI_ERSTSZ(0), XHCI_ERSTS_SET(1));
WriteRunReg32(XHCI_ERDP_LO(0), (uint32)fErst->rs_addr);
WriteRunReg32(XHCI_ERDP_HI(0), (uint32)(fErst->rs_addr >> 32));
WriteRunReg32(XHCI_ERSTBA_LO(0), (uint32)dmaAddress);
WriteRunReg32(XHCI_ERSTBA_HI(0), (uint32)(dmaAddress >> 32));
WriteRunReg32(XHCI_IMOD(0), 0x000003f8); // 4000 irq/s
WriteRunReg32(XHCI_IMOD(0), 0x000001f4); // 8000 irq/s
WriteRunReg32(XHCI_IMAN(0), ReadRunReg32(XHCI_IMAN(0)) | IMAN_INTR_ENA);
inline void WriteRunReg32(uint32 reg, uint32 value);