WriteControlReg
WriteControlReg( dwControlReg, E3G_FREQ_REG_DEFAULT, TRUE); // TRUE == force write
Status = WriteControlReg( dwControlReg, Get3gFreqReg(), TRUE );
if ( ECHOSTATUS_OK == WriteControlReg( dwControlReg, dwFreqReg) )
WriteControlReg( dwControlReg, Get3gFreqReg(), TRUE );
WriteControlReg( dwControlReg, Get3gFreqReg() );
WriteControlReg( dwControlReg, Get3gFreqReg() );
WriteControlReg( dwControlReg, Get3gFreqReg() );
ECHOSTATUS WriteControlReg
WriteControlReg( dwControlReg );
WriteControlReg( dwControlReg );
WriteControlReg( dwControlReg );
virtual ECHOSTATUS WriteControlReg( DWORD dwControlReg, BOOL fForceWrite = FALSE );
WriteControlReg( dwControlReg, TRUE );
WriteControlReg( dwControlReg, TRUE );
if ( ECHOSTATUS_OK == WriteControlReg( dwControlReg ) )
WriteControlReg( dwControlReg, TRUE );
if ( ECHOSTATUS_OK == WriteControlReg( dwControlReg ) )
WriteControlReg( dwControlReg, TRUE );
WriteControlReg( dwControlReg, TRUE );
WriteControlReg( dwControlReg, TRUE );
if ( ECHOSTATUS_OK == WriteControlReg( dwControlReg, fForceControlReg ) )