VMBUS_SINT_TIMER
msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER);
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER, msr);
TRACE("cpu%u: sint%u new msr 0x%llX\n", VMBUS_SINT_TIMER, cpu, (unsigned long long)msr);
msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER);
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER, msr);
TRACE("cpu%u: sint%u new msr 0x%llX\n", VMBUS_SINT_TIMER, cpu, (unsigned long long)msr);