VLV_DISPLAY_BASE
#define VLV_DISPLAY_PORT_B (VLV_DISPLAY_BASE + 0x64100)
#define VLV_DISPLAY_PORT_C (VLV_DISPLAY_BASE + 0x64200)
#define CHV_DISPLAY_PORT_D (VLV_DISPLAY_BASE + 0x64300)
blocks[REGISTER_BLOCK(REGS_SOUTH_SHARED)] += VLV_DISPLAY_BASE;
blocks[REGISTER_BLOCK(REGS_SOUTH_TRANSCODER_PORT)] += VLV_DISPLAY_BASE;
write32(info, VLV_DISPLAY_BASE + 0x6200, (1L << 28));