TRB_3_TYPE
td->trbs[i].flags = TRB_3_TYPE(TRB_TYPE_NORMAL)
td->trbs[i].flags &= ~(TRB_3_TYPE(TRB_TYPE_NORMAL));
td->trbs[i].flags |= TRB_3_TYPE(TRB_TYPE_ISOCH);
descriptor->trbs[descriptor->trb_used].flags = TRB_3_TYPE(TRB_TYPE_LINK)
B_HOST_TO_LENDIAN_INT32(TRB_3_TYPE(TRB_TYPE_LINK));
B_HOST_TO_LENDIAN_INT32(TRB_3_TYPE(TRB_TYPE_EVENT_DATA)
temp = TRB_3_TYPE(TRB_TYPE_LINK) | TRB_3_TC_BIT;
trb.flags = TRB_3_TYPE(TRB_TYPE_CMD_NOOP);
trb.flags = TRB_3_TYPE(TRB_TYPE_ENABLE_SLOT);
trb.flags = TRB_3_TYPE(TRB_TYPE_DISABLE_SLOT) | TRB_3_SLOT(slot);
trb.flags = TRB_3_TYPE(TRB_TYPE_ADDRESS_DEVICE) | TRB_3_SLOT(slot);
trb.flags = TRB_3_TYPE(TRB_TYPE_CONFIGURE_ENDPOINT) | TRB_3_SLOT(slot);
trb.flags = TRB_3_TYPE(TRB_TYPE_EVALUATE_CONTEXT) | TRB_3_SLOT(slot);
trb.flags = TRB_3_TYPE(TRB_TYPE_RESET_ENDPOINT)
trb.flags = TRB_3_TYPE(TRB_TYPE_STOP_ENDPOINT)
trb.flags = TRB_3_TYPE(TRB_TYPE_SET_TR_DEQUEUE)
trb.flags = TRB_3_TYPE(TRB_TYPE_RESET_DEVICE) | TRB_3_SLOT(slot);
= TRB_3_TYPE(TRB_TYPE_SETUP_STAGE) | TRB_3_IDT_BIT | TRB_3_CYCLE_BIT;
descriptor->trbs[index].flags = TRB_3_TYPE(TRB_TYPE_DATA_STAGE)
descriptor->trbs[index].flags = TRB_3_TYPE(TRB_TYPE_STATUS_STAGE)