src/add-ons/accelerants/s3/virge_init.cpp

165

} else if (si.chipType == S3_VIRGE_GX2 || S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_init.cpp

210

if (S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

299

if (S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

314

/* MXTESTME */ || S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

322

if ( (si.chipType == S3_VIRGE_GX2) || S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

331

S3_VIRGE_MX_SERIES(si.chipType) || si.chipType == S3_TRIO_3D) {

src/add-ons/accelerants/s3/virge_mode.cpp

343

if (S3_VIRGE_GX2_SERIES(si.chipType) || S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

346

if (S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

391

if (S3_VIRGE_GX2_SERIES(si.chipType) || S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

437

S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

457

if ( S3_VIRGE_GX2_SERIES(si.chipType) || S3_VIRGE_MX_SERIES(si.chipType) )

src/add-ons/accelerants/s3/virge_mode.cpp

479

S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

530

if (S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

562

else if (S3_VIRGE_GX2_SERIES(si.chipType) || S3_VIRGE_MX_SERIES(si.chipType)) {

src/add-ons/accelerants/s3/virge_mode.cpp

619

if (S3_VIRGE_GX2_SERIES(si.chipType) || S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

631

/* MXTESTME */ || S3_VIRGE_MX_SERIES(si.chipType) ) {

src/add-ons/accelerants/s3/virge_mode.cpp

651

S3_VIRGE_MX_SERIES(si.chipType) || si.chipType == S3_TRIO_3D) {