Regs
Regs();
return (*(uint32*)(&fBlockIo->Regs()->config[0])
+ ((uint64)(*(uint32*)(&fBlockIo->Regs()->config[4])) << 32)
dev->Regs()->status = 0; // reset
inline VirtioRegs* volatile Regs() {return fRegs;}
Regs()->div = 0;
Regs()->div = (uint32)(quotient - 1);
while (Regs()->txdata.isFull) {}
Regs()->txdata.val = ch;
data.val = Regs()->rxdata.val;