src/add-ons/accelerants/intel_810/i810_dpms.cpp

66

uint8 seq01 = ReadSeqReg(1) & ~0x20;

src/add-ons/accelerants/s3/register_io.h

49

uint8 ReadSeqReg(uint8 index);

src/add-ons/accelerants/s3/savage_dpms.cpp

42

switch (ReadSeqReg(0x0d) & 0x70) {

src/add-ons/accelerants/s3/savage_dpms.cpp

56

TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));

src/add-ons/accelerants/s3/savage_dpms.cpp

59

mode = ((ReadSeqReg(0x31) & 0x10) ? B_DPMS_ON : B_DPMS_OFF);

src/add-ons/accelerants/s3/savage_dpms.cpp

80

uint8 sr0D = ReadSeqReg(0x0d) & 0x03;

src/add-ons/accelerants/s3/savage_init.cpp

115

int panelX = (ReadSeqReg(0x61) + ((ReadSeqReg(0x66) & 0x02) << 7) + 1) * 8;

src/add-ons/accelerants/s3/savage_init.cpp

116

int panelY = ReadSeqReg(0x69) + ((ReadSeqReg(0x6e) & 0x70) << 4) + 1;

src/add-ons/accelerants/s3/savage_init.cpp

127

if ((ReadSeqReg(0x39) & 0x03) == 0)

src/add-ons/accelerants/s3/savage_init.cpp

129

else if ((ReadSeqReg(0x30) & 0x01) == 0)

src/add-ons/accelerants/s3/savage_init.cpp

262

if (ReadSeqReg(0x30) & 0x02 /* 0x04 */) {

src/add-ons/accelerants/s3/savage_init.cpp

283

uint8 m = ReadSeqReg(0x11) & 0x7f;

src/add-ons/accelerants/s3/savage_init.cpp

284

uint8 n = ReadSeqReg(0x10);

src/add-ons/accelerants/s3/savage_mode.cpp

623

temp = ReadSeqReg(0x15) & ~0x20;

src/add-ons/accelerants/s3/savage_mode.cpp

711

regRec.SR1B = ReadSeqReg(0x1b) | 0x10; // enable 8-bit Color Lookup Table

src/add-ons/accelerants/s3/trio64_dpms.cpp

39

switch (ReadSeqReg(0x0d) & 0x70) {

src/add-ons/accelerants/s3/trio64_dpms.cpp

53

TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));

src/add-ons/accelerants/s3/trio64_dpms.cpp

71

uint8 sr0D = ReadSeqReg(0x0d) & 0x03;

src/add-ons/accelerants/s3/trio64_init.cpp

125

uint8 m = ReadSeqReg(0x11) & 0x7f;

src/add-ons/accelerants/s3/trio64_init.cpp

126

uint8 n = ReadSeqReg(0x10);

src/add-ons/accelerants/s3/trio64_mode.cpp

102

uint8 tmp = ReadSeqReg(0x15) & ~0x21;

src/add-ons/accelerants/s3/virge_dpms.cpp

39

switch (ReadSeqReg(0x0d) & 0x70) {

src/add-ons/accelerants/s3/virge_dpms.cpp

53

TRACE("Unknown DPMS mode, reg sr0D: 0x%X\n", ReadSeqReg(0x0d));

src/add-ons/accelerants/s3/virge_dpms.cpp

71

uint8 sr0D = ReadSeqReg(0x0d) & 0x03;

src/add-ons/accelerants/s3/virge_init.cpp

202

uint8 m = ReadSeqReg(0x11) & 0x7f;

src/add-ons/accelerants/s3/virge_init.cpp

203

uint8 n = ReadSeqReg(0x10);

src/add-ons/accelerants/s3/virge_init.cpp

211

si.displayType = ((ReadSeqReg(0x31) & 0x10) ? MT_LCD : MT_CRT);

src/add-ons/accelerants/s3/virge_init.cpp

212

si.panelX = (ReadSeqReg(0x61) + ((ReadSeqReg(0x66) & 0x02) << 7) + 1) * 8;

src/add-ons/accelerants/s3/virge_init.cpp

213

si.panelY = ReadSeqReg(0x69) + ((ReadSeqReg(0x6e) & 0x70) << 4) + 1;

src/add-ons/accelerants/s3/virge_mode.cpp

356

uint8 tmp = ReadSeqReg(0x15) & ~0x21;

src/add-ons/accelerants/s3/virge_mode.cpp

514

regRec.SR15 = (ReadSeqReg(0x15) & 0x80) | 0x03; // keep BIOS init defaults

src/add-ons/accelerants/s3/virge_mode.cpp

515

regRec.SR0A = ReadSeqReg(0x0a);