ReadCrtcReg
WriteCrtcReg(IO_CTNL, ReadCrtcReg(IO_CTNL) | EXTENDED_CRTC_CNTL);
WriteCrtcReg(IO_CTNL, ReadCrtcReg(IO_CTNL) | EXTENDED_CRTC_CNTL);
uint8 ReadCrtcReg(uint8 index);
if (ReadCrtcReg(0x17) & 0x80) {
ReadCrtcReg(0x45); // reset cursor color stack pointer
ReadCrtcReg(0x45); // reset cursor color stack pointer
uint8 value = ReadCrtcReg(index);
uint8 tmp = ReadCrtcReg(DDCPort);
uint8 cr6b = ReadCrtcReg(0x6b);
uint8 cr36 = ReadCrtcReg(0x36); // get amount of video ram
if ((ReadCrtcReg(0x68) & 0xC0) == (0x01 << 6))
if (ReadCrtcReg(0x66) & 0x01) {
uint8 cr66 = ReadCrtcReg(0x66);
uint8 cr3a = ReadCrtcReg(0x3a);
regRec.CR3A = (ReadCrtcReg(0x3a) & 0x7f) | 0x15;
regRec.CR58 = (ReadCrtcReg(0x58) & 0x80) | 0x13;
regRec.CR86 = ReadCrtcReg(0x86) | 0x08;
regRec.CR88 = ReadCrtcReg(0x88) | DISABLE_BLOCK_WRITE_2D;
regRec.CRB0 = ReadCrtcReg(0xb0) | 0x80;
ReadCrtcReg(0x45); // reset cursor color stack pointer
ReadCrtcReg(0x45); // reset cursor color stack pointer
int ramSizeMB = ramSizes[(ReadCrtcReg(0x36) >> 5) & 0x7];
uint8 cr33 = ReadCrtcReg(0x33) & ~0x28;
if (ReadCrtcReg(0x17) & 0x80) {
ReadCrtcReg(0x45); // reset cursor color stack pointer
ReadCrtcReg(0x45); // reset cursor color stack pointer
uint8 tmp = ReadCrtcReg(DDCPort);
uint8 value = ReadCrtcReg(index);
uint8 config1 = ReadCrtcReg(0x36); // get amount of vram installed
uint8 config2 = ReadCrtcReg(0x37); // get amount of off-screen ram
uint8 tmp = ReadCrtcReg(resetidx);
uint8 tmp = ReadCrtcReg(regIndex);
if (ReadCrtcReg(si.chipType == S3_VIRGE_VX ? 0x63 : 0x66) & 0x01)
if ((ReadCrtcReg(0x67) & 0x0c) == 0x0c) {
uint8 cr66 = ReadCrtcReg(0x66);
uint8 temp = ReadCrtcReg(0x3a);
regRec.CR53 = ReadCrtcReg(0x53);
regRec.CR58 = ReadCrtcReg(0x58) & 0x80;
regRec.CR40 = ReadCrtcReg(0x40) & ~0x01;
regRec.CR6D = ReadCrtcReg(0x6d);
regRec.CR68 = ReadCrtcReg(0x68);