ReadConfig
uint16 bridgeControlOld = ReadConfig(dev->domain, dev->bus,
bridgeControlNew = ReadConfig(dev->domain, dev->bus, dev->device,
uint16 status = ReadConfig(dev->domain, dev->bus, dev->device,
uint16 secondaryStatus = ReadConfig(dev->domain, dev->bus,
uint16 bridgeControl = ReadConfig(dev->domain, dev->bus,
uint16 vendorID = ReadConfig(bus->domain, bus->bus, dev, 0,
uint16 deviceID = ReadConfig(bus->domain, bus->bus, dev, function,
uint8 baseClass = ReadConfig(bus->domain, bus->bus, dev, function,
uint8 subClass = ReadConfig(bus->domain, bus->bus, dev, function,
uint8 headerType = ReadConfig(bus->domain, bus->bus, dev, function,
uint8 secondaryBus = ReadConfig(bus->domain, bus->bus, dev, function,
uint64 pciAddress = ReadConfig(dev->domain, dev->bus, dev->device,
uint64 size = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
uint64 highPCIAddress = ReadConfig(dev->domain, dev->bus,
uint64 highSize = ReadConfig(dev->domain, dev->bus, dev->device,
uint32 oldValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
uint32 newValue = ReadConfig(dev->domain, dev->bus, dev->device, dev->function,
dev->info.vendor_id = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.device_id = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.revision = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.class_api = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.class_sub = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.class_base = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.line_size = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.latency = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.header_type = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.bist = ReadConfig(dev->domain, dev->bus, dev->device,
uint16 pcicmd = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.u.h0.cardbus_cis = ReadConfig(dev->domain, dev->bus,
dev->info.u.h0.subsystem_id = ReadConfig(dev->domain, dev->bus,
dev->info.u.h0.subsystem_vendor_id = ReadConfig(dev->domain,
dev->info.u.h0.interrupt_line = ReadConfig(dev->domain, dev->bus,
dev->info.u.h0.interrupt_pin = ReadConfig(dev->domain, dev->bus,
dev->info.u.h0.min_grant = ReadConfig(dev->domain, dev->bus,
dev->info.u.h0.max_latency = ReadConfig(dev->domain, dev->bus,
uint16 pcicmd = ReadConfig(dev->domain, dev->bus, dev->device,
dev->info.u.h1.primary_bus = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.secondary_bus = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.subordinate_bus = ReadConfig(dev->domain,
dev->info.u.h1.secondary_latency = ReadConfig(dev->domain,
dev->info.u.h1.io_base = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.io_limit = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.secondary_status = ReadConfig(dev->domain,
dev->info.u.h1.memory_base = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.memory_limit = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.prefetchable_memory_base = ReadConfig(dev->domain,
dev->info.u.h1.prefetchable_memory_limit = ReadConfig(
dev->info.u.h1.prefetchable_memory_base_upper32 = ReadConfig(
dev->info.u.h1.prefetchable_memory_limit_upper32 = ReadConfig(
dev->info.u.h1.io_base_upper16 = ReadConfig(dev->domain,
dev->info.u.h1.io_limit_upper16 = ReadConfig(dev->domain,
dev->info.u.h1.interrupt_line = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.interrupt_pin = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.bridge_control = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.subsystem_id = ReadConfig(dev->domain, dev->bus,
dev->info.u.h1.subsystem_vendor_id = ReadConfig(dev->domain,
dev->info.u.h2.subsystem_id = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.subsystem_vendor_id = ReadConfig(dev->domain,
dev->info.u.h2.primary_bus = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.secondary_bus = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.subordinate_bus = ReadConfig(dev->domain,
dev->info.u.h2.secondary_latency = ReadConfig(dev->domain,
dev->info.u.h2.memory_base = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.memory_limit = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.memory_base_upper32 = ReadConfig(dev->domain,
dev->info.u.h2.memory_limit_upper32 = ReadConfig(dev->domain,
dev->info.u.h2.io_base = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.io_limit = ReadConfig(dev->domain, dev->bus,
dev->info.u.h2.io_base_upper32 = ReadConfig(dev->domain,
dev->info.u.h2.io_limit_upper32 = ReadConfig(dev->domain,
dev->info.u.h2.secondary_status = ReadConfig(dev->domain,
dev->info.u.h2.bridge_control = ReadConfig(dev->domain,
if (ReadConfig(domain, bus, device, function, offset, size, &value)
if (ReadConfig(device->domain, device->bus, device->device,
uint16 status = ReadConfig(domain, bus, device, function, PCI_status, 2);
uint8 headerType = ReadConfig(domain, bus, device, function,
capPointer = ReadConfig(domain, bus, device, function, capPointer, 1);
if (ReadConfig(domain, bus, device, function, capPointer, 1) == capID) {
capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
uint32 capability = ReadConfig(domain, bus, device, function,
capability = ReadConfig(domain, bus, device, function,
capPointer = ReadConfig(domain, bus, device, function, *offset + 1,
uint8 capability = ReadConfig(domain, bus, device, function,
if ((ReadConfig(domain, bus, device, function,
capPointer = ReadConfig(domain, bus, device, function, capPointer + 1,
uint32 state = ReadConfig(device, capabilityOffset + PCI_pm_status, 2);
uint32 state = ReadConfig(device, capabilityOffset + PCI_pm_status, 2);
ReadConfig(device, PCI_command, 2) | PCI_command_int_disable);
ReadConfig(device, info->capability_offset + PCI_msi_control, 2));
ReadConfig(device, PCI_command, 2) | PCI_command_memory);
ReadConfig(device, PCI_command, 2) | PCI_command_int_disable);
ReadConfig(device, info->capability_offset + PCI_msix_control, 2));
info->control_value = ReadConfig(device->domain, device->bus,
info->control_value = ReadConfig(device->domain, device->bus,
uint32 table_value = ReadConfig(device->domain, device->bus,
uint32 pba_value = ReadConfig(device->domain, device->bus,
info->control_value = ReadConfig(device, offset + PCI_ht_command,
info->address_value = ReadConfig(device, offset
info->address_value |= ReadConfig(device, offset
if (gPCI->ReadConfig(domain, bus, device, function, offset, size,
uint8 type = ReadConfig(domain, bus, device,
uint16 vendor_id = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
uint16 device_id = ReadConfig(domain, bus, dev, function,
uint8 baseClass = ReadConfig(domain, bus, dev, function,
uint8 subClass = ReadConfig(domain, bus, dev, function,
uint8 headerType = ReadConfig(domain, bus, dev, function,
ReadConfig(domain, bus, dev, function, PCI_command, 2),
ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
ReadConfig(domain, bus, dev, function, PCI_command, 2),
ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
uint16 vendor_id = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
uint16 deviceID = ReadConfig(domain, bus, dev, function,
uint8 baseClass = ReadConfig(domain, bus, dev, function,
uint8 subClass = ReadConfig(domain, bus, dev, function,
uint8 headerType = ReadConfig(domain, bus, dev, function,
pcicmd = ReadConfig(domain, bus, dev, function, PCI_command, 2);
ReadConfig(domain, bus, dev, function, PCI_command, 2),
ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
ReadConfig(domain, bus, dev, function, PCI_command, 2),
ReadConfig(domain, bus, dev, function, PCI_primary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_secondary_bus, 1),
ReadConfig(domain, bus, dev, function, PCI_subordinate_bus, 1)));
uint16 vendorId = ReadConfig(domain, bus, dev, 0, PCI_vendor_id, 2);
uint16 deviceId = ReadConfig(domain, bus, dev, function,
uint8 baseClass = ReadConfig(domain, bus, dev, function,
uint8 subClass = ReadConfig(domain, bus, dev, function,
uint8 headerType = ReadConfig(domain, bus, dev, function,
int busBehindBridge = ReadConfig(domain, bus, dev, function,
status_t ReadConfig(uint8 domain, uint8 bus, uint8 device,
uint32 ReadConfig(uint8 domain, uint8 bus, uint8 device,
uint32 ReadConfig(PCIDev *device, uint16 offset,
return gPCI->ReadConfig(device->device, offset, size);
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x90, 1));
uint8 map = pci->ReadConfig(domain, bus, device, function, 0x90, 1);
uint32 bar5 = pci->ReadConfig(domain, bus, device, function, 0x24, 4);
uint16 pcicmd = pci->ReadConfig(domain, bus, device, function,
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x24, 4));
pci->ReadConfig(domain, bus, device, function, 0x90, 1));
uint16 vendorId = pci->ReadConfig(domain, bus, device, function,
uint16 deviceId = pci->ReadConfig(domain, bus, device, function,
uint32 val = pci->ReadConfig(domain, bus, device, function, 0x40, 4);
uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
status_t ReadConfig(
->ReadConfig(bus, device, function, offset, size, *value);
status_t ReadConfig(
->ReadConfig(bus, device, function, offset, size, *value);
return X86PCIControllerMeth1::ReadConfig(bus, device, function, offset,
return fECAMPCIController.ReadConfig(bus, device, function, offset, size, value);
status_t ReadConfig(
virtual status_t ReadConfig(
status_t ReadConfig(
status_t ReadConfig(
->ReadConfig(bus, device, function, offset, size, *value);