headers/private/graphics/radeon/pll_access.h

42

void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val, uint32 mask );

src/add-ons/accelerants/radeon/dpms.c

82

Radeon_OUTPLLP( ai->regs, ai->si->asic, RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb );

src/add-ons/accelerants/radeon/flat_panel.c

301

Radeon_OUTPLLP( ai->regs, ai->si->asic, RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb );

src/add-ons/accelerants/radeon/monitor_routing.c

485

Radeon_OUTPLLP( ai->regs, ai->si->asic,

src/add-ons/accelerants/radeon/monitor_routing.c

491

Radeon_OUTPLLP( ai->regs, ai->si->asic,

src/add-ons/accelerants/radeon/monitor_routing.c

496

Radeon_OUTPLLP( ai->regs, ai->si->asic,

src/add-ons/accelerants/radeon/overlay.c

101

Radeon_OUTPLLP( regs, si->asic, RADEON_VCLK_ECP_CNTL,

src/add-ons/accelerants/radeon/pll.c

40

Radeon_OUTPLLP( ai->regs, ai->si->asic,

src/add-ons/accelerants/radeon/pll.c

464

Radeon_OUTPLLP( regs, asic, crtc_idx == 0 ? RADEON_VCLK_ECP_CNTL : RADEON_PIXCLKS_CNTL,

src/add-ons/accelerants/radeon/pll.c

467

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

487

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

492

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

498

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

503

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

515

Radeon_OUTPLLP( regs, asic,

src/add-ons/accelerants/radeon/pll.c

526

Radeon_OUTPLLP( regs, asic,