RTWN_RIDX_HT_MCS
if (RTWN_RIDX_HT_MCS(ridx) > maxrate)
maxrate = RTWN_RIDX_HT_MCS(ridx);
max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1);
for (ridx = RTWN_RIDX_HT_MCS(0); ridx <= max_mcs; ridx++)
power[RTWN_RIDX_HT_MCS(i * 8 + 7)]);
max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1);
for (ridx = RTWN_RIDX_HT_MCS(0); ridx <= max_mcs; ridx++)
SM(R92C_TXAGC_MCS00, power[RTWN_RIDX_HT_MCS(0)]) |
SM(R92C_TXAGC_MCS01, power[RTWN_RIDX_HT_MCS(1)]) |
SM(R92C_TXAGC_MCS02, power[RTWN_RIDX_HT_MCS(2)]) |
SM(R92C_TXAGC_MCS03, power[RTWN_RIDX_HT_MCS(3)]));
SM(R92C_TXAGC_MCS04, power[RTWN_RIDX_HT_MCS(4)]) |
SM(R92C_TXAGC_MCS05, power[RTWN_RIDX_HT_MCS(5)]) |
SM(R92C_TXAGC_MCS06, power[RTWN_RIDX_HT_MCS(6)]) |
SM(R92C_TXAGC_MCS07, power[RTWN_RIDX_HT_MCS(7)]));
SM(R92C_TXAGC_MCS08, power[RTWN_RIDX_HT_MCS(8)]) |
SM(R92C_TXAGC_MCS09, power[RTWN_RIDX_HT_MCS(9)]) |
SM(R92C_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) |
SM(R92C_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)]));
SM(R92C_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) |
SM(R92C_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) |
SM(R92C_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) |
SM(R92C_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)]));
power[RTWN_RIDX_HT_MCS(i * 8 + 0)],
power[RTWN_RIDX_HT_MCS(i * 8 + 1)],
power[RTWN_RIDX_HT_MCS(i * 8 + 2)],
power[RTWN_RIDX_HT_MCS(i * 8 + 3)],
power[RTWN_RIDX_HT_MCS(i * 8 + 4)],
power[RTWN_RIDX_HT_MCS(i * 8 + 5)],
power[RTWN_RIDX_HT_MCS(i * 8 + 6)],
max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1);
min_mcs = RTWN_RIDX_HT_MCS(i * 8);
power_level = (int32_t) power[RTWN_RIDX_HT_MCS(7)];
max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1);
min_mcs = RTWN_RIDX_HT_MCS(i * 8);
min_mcs = RTWN_RIDX_HT_MCS(i * 8);
SM(R12A_TXAGC_MCS0, power[RTWN_RIDX_HT_MCS(0)]) |
SM(R12A_TXAGC_MCS1, power[RTWN_RIDX_HT_MCS(1)]) |
SM(R12A_TXAGC_MCS2, power[RTWN_RIDX_HT_MCS(2)]) |
SM(R12A_TXAGC_MCS3, power[RTWN_RIDX_HT_MCS(3)]));
SM(R12A_TXAGC_MCS4, power[RTWN_RIDX_HT_MCS(4)]) |
SM(R12A_TXAGC_MCS5, power[RTWN_RIDX_HT_MCS(5)]) |
SM(R12A_TXAGC_MCS6, power[RTWN_RIDX_HT_MCS(6)]) |
SM(R12A_TXAGC_MCS7, power[RTWN_RIDX_HT_MCS(7)]));
SM(R12A_TXAGC_MCS8, power[RTWN_RIDX_HT_MCS(8)]) |
SM(R12A_TXAGC_MCS9, power[RTWN_RIDX_HT_MCS(9)]) |
SM(R12A_TXAGC_MCS10, power[RTWN_RIDX_HT_MCS(10)]) |
SM(R12A_TXAGC_MCS11, power[RTWN_RIDX_HT_MCS(11)]));
SM(R12A_TXAGC_MCS12, power[RTWN_RIDX_HT_MCS(12)]) |
SM(R12A_TXAGC_MCS13, power[RTWN_RIDX_HT_MCS(13)]) |
SM(R12A_TXAGC_MCS14, power[RTWN_RIDX_HT_MCS(14)]) |
SM(R12A_TXAGC_MCS15, power[RTWN_RIDX_HT_MCS(15)]));