RADEON_VCLK_SRC_SEL_MASK
~(RADEON_VCLK_ECP_CNTL_BYTE_CLK_POST_DIV_MASK | RADEON_VCLK_SRC_SEL_MASK);
values->vclk_ecp_cntl &= ~RADEON_VCLK_SRC_SEL_MASK;
~RADEON_VCLK_SRC_SEL_MASK );
RADEON_VCLK_SRC_CPU_CLK, ~RADEON_VCLK_SRC_SEL_MASK );
RADEON_VCLK_SRC_PPLL_CLK, ~RADEON_VCLK_SRC_SEL_MASK );