R92C_RSV_CTRL
reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
rtwn_write_1(sc, R92C_RSV_CTRL, 0);
reg = rtwn_read_1(sc, R92C_RSV_CTRL + 1);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
rtwn_write_1(sc, R92C_RSV_CTRL, 0);
rtwn_write_1(sc, R92C_RSV_CTRL, 0x0e);
RTWN_CHK(rtwn_write_1(sc, R92C_RSV_CTRL, 0));
rtwn_write_1(sc, R92C_RSV_CTRL, 0x0E);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0x01, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0, 0x01);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0x01, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0, 0x01);
rtwn_setbits_1(sc, R92C_RSV_CTRL, R92C_RSV_CTRL_WLOCK_00, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0x08, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL, R92C_RSV_CTRL_WLOCK_00, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0, 0x08);
rtwn_setbits_1(sc, R92C_RSV_CTRL, 0, 0x60);
rtwn_setbits_1(sc, R92C_RSV_CTRL, 0x02, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0x01, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL, 0x02, 0);
rtwn_setbits_1(sc, R92C_RSV_CTRL + 1, 0, 0x01);