AR_TIMER2
OS_REG_WRITE(ah, AR_TIMER2, bs->bs_cfpnext << 3);
OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba);
OS_REG_WRITE(ah, AR_TIMER2, ~0); /* next SW beacon alert */
OS_REG_WRITE(ah, AR_TIMER2, bs->bs_cfpnext << 3);
OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba);
OS_REG_WRITE(ah, AR_TIMER2, bs->bs_cfpnext << 3);
OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba & 0x1ffffff);