src/add-ons/accelerants/nvidia/engine/nv_acc.c

1013

si->engine.fifo.handle[4] = NV_IMAGE_BLIT;

src/add-ons/accelerants/nvidia/engine/nv_acc.c

1319

!si->engine.fifo.ch_ptr[NV_IMAGE_BLIT] ||

src/add-ons/accelerants/nvidia/engine/nv_acc.c

1338

si->engine.fifo.handle[4] = NV_IMAGE_BLIT;

src/add-ons/accelerants/nvidia/engine/nv_acc.c

1367

&(regs[(si->engine.fifo.ch_ptr[NV_IMAGE_BLIT]) >> 2]);

src/add-ons/accelerants/nvidia/engine/nv_acc.c

210

ACCW(HT_HANDL_01, (0x80000000 | NV_IMAGE_BLIT)); /* 32bit handle */

src/add-ons/accelerants/nvidia/engine/nv_acc.c

232

ACCW(HT_HANDL_01, (0x80000000 | NV_IMAGE_BLIT)); /* 32bit handle */

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

1031

si->engine.fifo.handle[4] = NV_IMAGE_BLIT;

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

1603

!si->engine.fifo.ch_ptr[NV_IMAGE_BLIT] ||

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

1623

si->engine.fifo.handle[4] = NV_IMAGE_BLIT;

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

1707

nv_acc_cmd_dma(NV_IMAGE_BLIT, NV_IMAGE_BLIT_SOURCEORG, 3);

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

225

ACCW(HT_HANDL_01, (0x80000000 | NV_IMAGE_BLIT)); /* 32bit handle */

src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c

250

ACCW(HT_HANDL_01, (0x80000000 | NV_IMAGE_BLIT)); /* 32bit handle */