headers/private/kernel/arch/arm/pxa270.h

101

#define OVL1C1 (LCC_BASE+0x50)

headers/private/kernel/arch/arm/pxa270.h

102

#define OVL1C2 (LCC_BASE+0x60)

headers/private/kernel/arch/arm/pxa270.h

103

#define OVL2C1 (LCC_BASE+0x70)

headers/private/kernel/arch/arm/pxa270.h

104

#define OVL2C2 (LCC_BASE+0x80)

headers/private/kernel/arch/arm/pxa270.h

106

#define LCC_CCR (LCC_BASE+0x90)

headers/private/kernel/arch/arm/pxa270.h

107

#define LCC_CMDCR (LCC_BASE+0x100)

headers/private/kernel/arch/arm/pxa270.h

109

#define FDADR0 (LCC_BASE+0x200)

headers/private/kernel/arch/arm/pxa270.h

110

#define FBR0 (LCC_BASE+0x020)

headers/private/kernel/arch/arm/pxa270.h

111

#define FSADR0 (LCC_BASE+0x204)

headers/private/kernel/arch/arm/pxa270.h

90

#define LCCR0 (LCC_BASE+0x00)

headers/private/kernel/arch/arm/pxa270.h

91

#define LCCR1 (LCC_BASE+0x04)

headers/private/kernel/arch/arm/pxa270.h

92

#define LCCR2 (LCC_BASE+0x08)

headers/private/kernel/arch/arm/pxa270.h

93

#define LCCR3 (LCC_BASE+0x0C)

headers/private/kernel/arch/arm/pxa270.h

94

#define LCCR4 (LCC_BASE+0x10)

headers/private/kernel/arch/arm/pxa270.h

95

#define LCCR5 (LCC_BASE+0x14)

headers/private/kernel/arch/arm/pxa270.h

97

#define LCSR1 (LCC_BASE+0x34)

headers/private/kernel/arch/arm/pxa270.h

98

#define LCSR0 (LCC_BASE+0x38)

headers/private/kernel/arch/arm/pxa270.h

99

#define LIIDR (LCC_BASE+0x3C)