IWM_SETBITS
IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
IWM_SETBITS(sc, IWM_CSR_GP_CNTRL,
IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
IWM_SETBITS(sc, IWM_CSR_MBOX_SET_REG,
IWM_SETBITS(sc, IWM_CSR_DBG_LINK_PWR_MGMT_REG,
IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
IWM_SETBITS(sc, IWM_CSR_GIO_REG,
IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
IWM_SETBITS(sc, IWM_CSR_GIO_CHICKEN_BITS,
IWM_SETBITS(sc, IWM_CSR_DBG_HPET_MEM_REG, IWM_CSR_DBG_HPET_MEM_REG_VAL);
IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
IWM_SETBITS(trans, IWM_CSR_ANA_PLL_CFG,
IWM_SETBITS(sc, IWM_CSR_GP_CNTRL, IWM_CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
IWM_SETBITS(sc, IWM_CSR_DBG_LINK_PWR_MGMT_REG,
IWM_SETBITS(sc, IWM_CSR_HW_IF_CONFIG_REG,
IWM_SETBITS(sc, IWM_CSR_RESET, IWM_CSR_RESET_REG_FLAG_STOP_MASTER);
IWM_SETBITS(sc, IWM_CSR_INT_COALESCING, IWM_HOST_INT_OPER_MODE);
IWM_SETBITS(sc, IWM_CSR_MAC_SHADOW_REG_CTRL, 0x800fffff);
IWM_SETBITS(sc, IWM_FH_TX_CHICKEN_BITS_REG,