IWM_CSR_MSIX_HW_INT_MASK_AD
IWM_WRITE(sc, IWM_CSR_MSIX_HW_INT_MASK_AD,
IWM_WRITE(sc, IWM_CSR_MSIX_HW_INT_MASK_AD,
IWM_WRITE(sc, IWM_CSR_MSIX_HW_INT_MASK_AD,
IWM_WRITE(sc, IWM_CSR_MSIX_HW_INT_MASK_AD,
sc->sc_hw_init_mask = ~IWM_READ(sc, IWM_CSR_MSIX_HW_INT_MASK_AD);
IWM_WRITE(sc, IWM_CSR_MSIX_HW_INT_MASK_AD, ~0);
IWM_CLRBITS(sc, IWM_CSR_MSIX_HW_INT_MASK_AD,