headers/private/kernel/arch/arm/omap3.h

202

#define INTC_REVISION (INTC_BASE + 0x000)

headers/private/kernel/arch/arm/omap3.h

203

#define INTC_SYSCONFIG (INTC_BASE + 0x010)

headers/private/kernel/arch/arm/omap3.h

204

#define INTC_SYSSTATUS (INTC_BASE + 0x014)

headers/private/kernel/arch/arm/omap3.h

205

#define INTC_SIR_IRQ (INTC_BASE + 0x040)

headers/private/kernel/arch/arm/omap3.h

206

#define INTC_SIR_FIQ (INTC_BASE + 0x044)

headers/private/kernel/arch/arm/omap3.h

207

#define INTC_CONTROL (INTC_BASE + 0x048)

headers/private/kernel/arch/arm/omap3.h

208

#define INTC_PROTECTION (INTC_BASE + 0x04C)

headers/private/kernel/arch/arm/omap3.h

209

#define INTC_IDLE (INTC_BASE + 0x050)

headers/private/kernel/arch/arm/omap3.h

210

#define INTC_IRQ_PRIORITY (INTC_BASE + 0x060)

headers/private/kernel/arch/arm/omap3.h

211

#define INTC_FIQ_PRIORITY (INTC_BASE + 0x064)

headers/private/kernel/arch/arm/omap3.h

212

#define INTC_THRESHOLD (INTC_BASE + 0x068)

headers/private/kernel/arch/arm/omap3.h

213

#define INTC_ITR(n) (INTC_BASE + 0x080 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

214

#define INTC_MIR(n) (INTC_BASE + 0x084 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

215

#define INTC_MIR_CLEAR(n) (INTC_BASE + 0x088 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

216

#define INTC_MIR_SET(n) (INTC_BASE + 0x08C + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

217

#define INTC_ISR_SET(n) (INTC_BASE + 0x090 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

218

#define INTC_ISR_CLEAR(n) (INTC_BASE + 0x094 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

219

#define INTC_PENDING_IRQ(n) (INTC_BASE + 0x098 + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

220

#define INTC_PENDING_FIQ(n) (INTC_BASE + 0x09C + (n) * 0x20)

headers/private/kernel/arch/arm/omap3.h

221

#define INTC_ILR(n) (INTC_BASE + 0x100 + (n) * 4)