ENG_RG32
#define DACR(A) (ENG_RG32(ENDAC_##A))
#define DACW(A,B) (ENG_RG32(ENDAC_##A)=B)
#define DAC2R(A) (ENG_RG32(ENDAC2_##A))
#define DAC2W(A,B) (ENG_RG32(ENDAC2_##A)=B)
#define BESR(A) (ENG_RG32(ENBES_##A))
#define BESW(A,B) (ENG_RG32(ENBES_##A)=B)
#define ACCR(A) (ENG_RG32(ENACC_##A))
#define ACCW(A,B) (ENG_RG32(ENACC_##A)=B)
ENG_RG32(RG32_FUNCSEL) &= ~0x00001000;
ENG_RG32(RG32_2FUNCSEL) |= 0x00001000;
ENG_RG32(RG32_2FUNCSEL) &= ~0x00001000;
ENG_RG32(RG32_FUNCSEL) |= 0x00001000;
while (((ENG_RG32(RG32_RASTER) & 0x000007ff) < si->dm.timing.v_display) &&
ENG_RG32(RG32_NV10FBSTADD32) = (startadd & 0xfffffffc);
ENG_RG32(RG32_NV10CURADD32) = (curadd & 0xfffff800);
ENG_RG32(RG32_CURCONF) = 0x02000100;
while (((uint16)(ENG_RG32(RG32_RASTER) & 0x000007ff)) < (yhigh + 16))
while ((ENG_RG32(RG32_RASTER) & 0x000007ff) < si->dm.timing.v_display)
while (((ENG_RG32(RG32_RASTER2) & 0x000007ff) < si->dm.timing.v_display) &&
ENG_RG32(RG32_NV10FB2STADD32) = (startadd & 0xfffffffc);
ENG_RG32(RG32_NV10CUR2ADD32) = (curadd & 0xfffff800);
ENG_RG32(RG32_2CURCONF) = 0x02000100;
while (((uint16)(ENG_RG32(RG32_RASTER2) & 0x000007ff)) < (yhigh + 16))
while ((ENG_RG32(RG32_RASTER2) & 0x000007ff) < si->dm.timing.v_display)
ENG_RG32(RG32_2FUNCSEL) &= ~0x00001000;
ENG_RG32(RG32_FUNCSEL) |= 0x00001000;
ENG_RG32(reg2) = data;
data = ENG_RG32(reg2);
ENG_RG32(reg2) = ((data & 0xffff0000) | (n << 8) | m);
data = ENG_RG32(reg2);
ENG_RG32(reg2) = ((p << 16) | (n << 8) | m);
data = ENG_RG32(reg);
ENG_RG32(reg2) = data2;
data = ENG_RG32(reg);
ENG_RG32(reg) = data;
ENG_RG32(reg) = data;
ENG_RG32(reg) = data2;
data = ENG_RG32(reg);
ENG_RG32(reg) = data;
ENG_RG32(reg2) = data2;
data = ENG_RG32(reg);
data2 = ENG_RG32(reg);
ENG_RG32(reg) = ((data2 & 0xffff0000) | (n << 8) | m);
data2 = ENG_RG32(reg);
ENG_RG32(reg) = ((p << 16) | (n << 8) | m);
if (*exec) ENG_RG32(reg) = data;
ENG_RG32(RG32_PFB_REFCTRL) = 0x80000000;
data = ENG_RG32(RG32_PFB_CONFIG_0);
ENG_RG32(RG32_PFB_CONFIG_0) = data;
data = ENG_RG32(RG32_NV10STRAPINFO);
ENG_RG32(RG32_PFB_CONFIG_0) &= 0xffffefff;
ENG_RG32(RG32_PFB_REFCTRL) = 0x80000000;
ENG_RG32(RG32_PFB_CONFIG_0) |= 0x00000800;
ENG_RG32(RG32_PFB_CONFIG_0) &= ~0x00000800;
LOG(2,("DUALHEAD_CTRL: $%08x\n", ENG_RG32(RG32_DUALHEAD_CTRL)));
LOG(2,("DAC1: FUNCSEL: $%08x\n", ENG_RG32(RG32_FUNCSEL)));
LOG(2,("DAC1: PANEL_PWR: $%08x\n", ENG_RG32(RG32_PANEL_PWR)));
LOG(2,("DAC2: FUNCSEL: $%08x\n", ENG_RG32(RG32_2FUNCSEL)));
LOG(2,("DAC2: PANEL_PWR: $%08x\n", ENG_RG32(RG32_2PANEL_PWR)));
uint32 strapinfo = ENG_RG32(RG32_NV4STRAPINFO);
uint32 strapinfo = ENG_RG32(RG32_NVSTRAPINFO2);
uint32 strapinfo = ENG_RG32(RG32_NV10STRAPINFO);
uint32 strapinfo = ENG_RG32(RG32_NVSTRAPINFO2);
fb_mrs2 = ENG_RG32(RG32_FB_MRS2);
fb_mrs1 = ENG_RG32(RG32_FB_MRS1);
ENG_RG32(RG32_FB_MRS2) = fb_mrs2;
ENG_RG32(RG32_FB_MRS1) = fb_mrs1;
ENG_RG32(reg) = ((p << 16) | (n << 8) | m);
if (exec) ENG_RG32(reg) = data2;
ENG_RG32(reg) = data;
ENG_RG32(reg) = data2;
data = ENG_RG32(RG32_NV4STRAPINFO);
data = ENG_RG32(reg);
ENG_RG32(reg) = data;
data = ENG_RG32(RG32_NVSTRAPINFO2);
if (exec) ENG_RG32(reg) = data;
ENG_RG32(reg) = ((p << 16) | (n << 8) | m);
if (exec) ENG_RG32(reg) = data;
ENG_RG32(RG32_PFB_DEBUG_0) &= 0xffffffef;
ram_cfg = ((ENG_RG32(RG32_NVSTRAPINFO2) >> 2) & 0x0000000f);
data = (ENG_RG32(RG32_NV4STRAPINFO) & 0xffffffc0);
ENG_RG32(RG32_NV4STRAPINFO) = (data | (ram_cfg & 0x0000003f));
data = (ENG_RG32(RG32_PFB_CONFIG_1) & 0xff8ffffe);
ENG_RG32(RG32_PFB_CONFIG_1) = data;
ENG_RG32(RG32_PFB_CONFIG_1) = (data | 0x00000001);
ENG_RG32(RG32_NV4STRAPINFO) &= ~0x00000004;
data = ENG_RG32(reg);
ENG_RG32(reg2) = data2;