AE_WRITE_4
AE_WRITE_4(sc, AE_WOL_REG, 0);
AE_WRITE_4(sc, AE_WOL_REG, AE_WOL_MAGIC | \
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_WOL_REG, AE_WOL_LNKCHG | \
AE_WRITE_4(sc, AE_MAC_REG, 0);
AE_WRITE_4(sc, AE_PCIE_PHYMISC_REG, val);
AE_WRITE_4(sc, AE_PCIE_DLL_TX_CTRL_REG, val);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_ISR_REG, AE_ISR_DISABLE);
AE_WRITE_4(sc, AE_ISR_REG, val | AE_ISR_DISABLE);
AE_WRITE_4(sc, AE_ISR_REG, 0);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_REG_MHT0, 0);
AE_WRITE_4(sc, AE_REG_MHT1, 0);
AE_WRITE_4(sc, AE_REG_MHT0, 0xffffffff);
AE_WRITE_4(sc, AE_REG_MHT1, 0xffffffff);
AE_WRITE_4(sc, AE_MAC_REG, rxcfg);
AE_WRITE_4(sc, AE_REG_MHT0, mchash[0]);
AE_WRITE_4(sc, AE_REG_MHT1, mchash[1]);
AE_WRITE_4(sc, AE_MAC_REG, rxcfg);
AE_WRITE_4(sc, AE_IMR_REG, 0);
AE_WRITE_4(sc, AE_ISR_REG, 0xffffffff);
AE_WRITE_4(sc, AE_PCIE_LTSSM_TESTMODE_REG, AE_PCIE_LTSSM_TESTMODE_DEFAULT);
AE_WRITE_4(sc, AE_PCIE_DLL_TX_CTRL_REG, AE_PCIE_DLL_TX_CTRL_DEFAULT);
AE_WRITE_4(sc, AE_PHY_ENABLE_REG, AE_PHY_ENABLE);
AE_WRITE_4(sc, AE_MASTER_REG, AE_MASTER_SOFT_RESET);
AE_WRITE_4(sc, AE_ISR_REG, 0xffffffff);
AE_WRITE_4(sc, AE_EADDR0_REG, val);
AE_WRITE_4(sc, AE_EADDR1_REG, val);
AE_WRITE_4(sc, AE_DESC_ADDR_HI_REG, BUS_ADDR_HI(addr));
AE_WRITE_4(sc, AE_RXD_ADDR_LO_REG, BUS_ADDR_LO(addr));
AE_WRITE_4(sc, AE_TXD_ADDR_LO_REG, BUS_ADDR_LO(addr));
AE_WRITE_4(sc, AE_TXS_ADDR_LO_REG, BUS_ADDR_LO(addr));
AE_WRITE_4(sc, AE_IFG_REG, val);
AE_WRITE_4(sc, AE_HDPX_REG, val);
AE_WRITE_4(sc, AE_MASTER_REG, val);
AE_WRITE_4(sc, AE_CUT_THRESH_REG, AE_CUT_THRESH_DEFAULT);
AE_WRITE_4(sc, AE_ISR_REG, 0x3fffffff);
AE_WRITE_4(sc, AE_ISR_REG, 0x0);
AE_WRITE_4(sc, AE_MASTER_REG, val | AE_MASTER_MANUAL_INT);
AE_WRITE_4(sc, AE_IMR_REG, AE_IMR_DEFAULT);
AE_WRITE_4(sc, AE_WOL_REG, 0);
AE_WRITE_4(sc, AE_MAC_REG, val);
AE_WRITE_4(sc, AE_MAC_REG, val | AE_MAC_TX_EN | AE_MAC_RX_EN);
AE_WRITE_4(sc, AE_MDIO_REG, val);
AE_WRITE_4(sc, AE_MDIO_REG, aereg);
AE_WRITE_4(sc, AE_SPICTL_REG, val);
AE_WRITE_4(sc, AE_VPD_DATA_REG, 0); /* Clear register value. */
AE_WRITE_4(sc, AE_VPD_CAP_REG, (val << AE_VPD_CAP_ADDR_SHIFT) &