headers/private/graphics/matrox/mga_macros.h

320

#define DXIR(A) (DACW(PALWTADD,MGADXI_##A),DACR(X_DATAREG))

headers/private/graphics/matrox/mga_macros.h

321

#define DXIW(A,B) (DACW(PALWTADD,MGADXI_##A),DACW(X_DATAREG,B))

src/add-ons/accelerants/matrox/engine/mga_crtc.c

550

DACW(TVP_CUROVRWTADD,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

552

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

553

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

554

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

556

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

557

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

558

DACW(TVP_CUROVRDATA,0xff);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

560

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

561

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

562

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

564

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

565

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

566

DACW(TVP_CUROVRDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

571

DACW(PALWTADD,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

575

DACW(TVP_CURRAMDATA,0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

637

DACW(PALWTADD, 0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

641

DACW(PALWTADD, (y * 8));

src/add-ons/accelerants/matrox/engine/mga_crtc.c

642

DACW(TVP_CURRAMDATA, ~*andMask++);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

643

DACW(TVP_CURRAMDATA, ~*andMask++);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

647

DACW(PALWTADD, 0x00);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

651

DACW(PALWTADD, y*8);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

652

DACW(TVP_CURRAMDATA, *xorMask++);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

653

DACW(TVP_CURRAMDATA, *xorMask++);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

679

DACW(CURSPOSXL,x&0xFF);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

680

DACW(CURSPOSXH,x>>8);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

681

DACW(CURSPOSYL,y&0xFF);

src/add-ons/accelerants/matrox/engine/mga_crtc.c

682

DACW(CURSPOSYH,y>>8);

src/add-ons/accelerants/matrox/engine/mga_dac.c

139

DACW(PIXRDMSK,0xff);

src/add-ons/accelerants/matrox/engine/mga_dac.c

153

DACW(PALWTADD,0);

src/add-ons/accelerants/matrox/engine/mga_dac.c

158

DACW(PALDATA,r[i]);

src/add-ons/accelerants/matrox/engine/mga_dac.c

159

DACW(PALDATA,g[i]);

src/add-ons/accelerants/matrox/engine/mga_dac.c

160

DACW(PALDATA,b[i]);

src/add-ons/accelerants/matrox/engine/mga_dac.c

172

DACW(PALRDADD,0);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1011

DACW(CURPOS, ((x & 0x0fff) | ((y & 0x0fff) << 16)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1071

DACW(TV_SETUP, ((DACR(TV_SETUP) & ~0x00000003) | 0x01000000));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1075

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1077

DACW(PLLSEL, 0x10000700);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1115

DACW(TV_SETUP, ((DACR(TV_SETUP) & ~0x00000002) | 0x01000001));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1120

DACW(PLLSEL, 0x20030f00);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1122

DACW(PLLSEL, 0x00030700);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

301

DACW(FP_DEBUG1, 0);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

459

DACW(FP_HVALID_S, 0);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

460

DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

462

DACW(FP_VVALID_S, 0);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

463

DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

470

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

475

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

480

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

494

DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

496

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

499

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

525

DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

530

DACW(FP_HVALID_S, diff);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

531

DACW(FP_HVALID_E, ((si->ps.p1_timing.h_display - diff) - 1));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

596

DACW(GENCTRL, genctrl);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

633

DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | panelsync));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

676

DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | 0x20000022));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

864

DACW(NV10_CURSYNC, (DACR(NV10_CURSYNC) | 0x02000000));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

885

if (si->ps.card_arch == NV40A) DACW(CURPOS, (DACR(CURPOS)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

903

if (si->ps.card_arch == NV40A) DACW(CURPOS, (DACR(CURPOS)));

src/add-ons/accelerants/nvidia/engine/nv_crtc2.c

1028

DACW(PLLSEL, 0x100c0f00);

src/add-ons/accelerants/nvidia/engine/nv_crtc2.c

989

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

119

DACW(NV11_DITHER, (DACR(NV11_DITHER) | 0x00010000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

122

DACW(FP_DITH_PATT1, 0xe4e4e4e4);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

123

DACW(FP_DITH_PATT2, 0xe4e4e4e4);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

124

DACW(FP_DITH_PATT3, 0xe4e4e4e4);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

125

DACW(FP_DITH_PATT4, 0x44444444);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

126

DACW(FP_DITH_PATT5, 0x44444444);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

127

DACW(FP_DITH_PATT6, 0x44444444);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

130

DACW(FP_DITHER, (DACR(FP_DITHER) | 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

137

DACW(NV11_DITHER, (DACR(NV11_DITHER) & ~0x00010000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

140

DACW(FP_DITHER, (DACR(FP_DITHER) & ~0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

228

DACW(NV30_PLLSETUP, (DACR(NV30_PLLSETUP) & ~0x000000f0));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

241

DACW(PIXPLLC, ((p << 16) | (n << 8) | m));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

244

if (si->ps.ext_pll) DACW(PIXPLLC2, 0x80000401);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

258

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

26

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

260

DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

261

DACW(PLLSEL, 0x30000f04);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

264

DACW(PLLSEL, 0x10000700);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

30

DACW(OUTPUT, (output & 0x0000feee));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

310

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

312

DACW(PLLSEL, 0x10000700);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

39

DACW(OUTPUT, (output & 0x0000ffee));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

44

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

47

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

49

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

66

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

69

DACW(OUTPUT, output);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

71

DACW(TSTCTRL, dac);

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

193

DACW(NV30_PLLSETUP, (DACR(NV30_PLLSETUP) & ~0x000000f0));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

222

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

224

DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

225

DACW(PLLSEL, 0x30000f04);

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

270

DACW(PLLSEL, 0x30000f00);

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

51

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

54

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

72

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1662

DACW(OUTPUT, 0x00000101);

src/add-ons/accelerants/nvidia/engine/nv_general.c

1671

DACW(OUTPUT, 0x00000001);

src/add-ons/accelerants/nvidia/engine/nv_general.c

1850

DACW(GENCTRL, 0x00100100);

src/add-ons/accelerants/nvidia/engine/nv_general.c

1860

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1864

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2545

DACW(FP_TMDS_CTRL, ((1 << 16) | 0x04));

src/add-ons/accelerants/skeleton/engine/crtc.c

175

DACW(FP_DEBUG1, 0);

src/add-ons/accelerants/skeleton/engine/crtc.c

333

DACW(FP_HVALID_S, 0);

src/add-ons/accelerants/skeleton/engine/crtc.c

334

DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));

src/add-ons/accelerants/skeleton/engine/crtc.c

336

DACW(FP_VVALID_S, 0);

src/add-ons/accelerants/skeleton/engine/crtc.c

337

DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));

src/add-ons/accelerants/skeleton/engine/crtc.c

344

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/skeleton/engine/crtc.c

349

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/skeleton/engine/crtc.c

354

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/skeleton/engine/crtc.c

368

DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));

src/add-ons/accelerants/skeleton/engine/crtc.c

370

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/skeleton/engine/crtc.c

373

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/skeleton/engine/crtc.c

399

DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));

src/add-ons/accelerants/skeleton/engine/crtc.c

404

DACW(FP_HVALID_S, diff);

src/add-ons/accelerants/skeleton/engine/crtc.c

405

DACW(FP_HVALID_E, ((si->ps.p1_timing.h_display - diff) - 1));

src/add-ons/accelerants/skeleton/engine/crtc.c

470

DACW(GENCTRL, genctrl);

src/add-ons/accelerants/skeleton/engine/crtc.c

505

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));

src/add-ons/accelerants/skeleton/engine/crtc.c

526

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));

src/add-ons/accelerants/skeleton/engine/crtc.c

826

DACW(CURPOS, ((x & 0x0fff) | ((y & 0x0fff) << 16)));

src/add-ons/accelerants/skeleton/engine/dac.c

181

DACW(PIXPLLC, ((p << 16) | (n << 8) | m));

src/add-ons/accelerants/skeleton/engine/dac.c

184

if (si->ps.ext_pll) DACW(PIXPLLC2, 0x80000401);

src/add-ons/accelerants/skeleton/engine/dac.c

25

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/skeleton/engine/dac.c

27

DACW(OUTPUT, (output & 0x0000feee));

src/add-ons/accelerants/skeleton/engine/dac.c

31

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/skeleton/engine/dac.c

34

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/skeleton/engine/dac.c

36

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/skeleton/engine/dac.c

53

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/skeleton/engine/dac.c

56

DACW(OUTPUT, output);

src/add-ons/accelerants/skeleton/engine/dac.c

58

DACW(TSTCTRL, dac);

src/add-ons/accelerants/skeleton/engine/dac2.c

40

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/skeleton/engine/dac2.c

43

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/skeleton/engine/dac2.c

61

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/skeleton/engine/general.c

359

DACW(OUTPUT, 0x00000101);

src/add-ons/accelerants/skeleton/engine/general.c

368

DACW(OUTPUT, 0x00000001);

src/add-ons/accelerants/via/engine/crtc.c

165

DACW(FP_DEBUG1, 0);

src/add-ons/accelerants/via/engine/crtc.c

322

DACW(FP_HVALID_S, 0);

src/add-ons/accelerants/via/engine/crtc.c

323

DACW(FP_HVALID_E, (si->ps.p1_timing.h_display - 1));

src/add-ons/accelerants/via/engine/crtc.c

325

DACW(FP_VVALID_S, 0);

src/add-ons/accelerants/via/engine/crtc.c

326

DACW(FP_VVALID_E, (si->ps.p1_timing.v_display - 1));

src/add-ons/accelerants/via/engine/crtc.c

333

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/via/engine/crtc.c

338

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/via/engine/crtc.c

343

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/via/engine/crtc.c

357

DACW(FP_DEBUG2, ((1 << 28) | ((target.timing.v_display - 1) << 16)));

src/add-ons/accelerants/via/engine/crtc.c

359

DACW(FP_DEBUG2, 0x00000000);

src/add-ons/accelerants/via/engine/crtc.c

362

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/via/engine/crtc.c

388

DACW(FP_DEBUG1, (((iscale_x >> 1) & 0x00000fff) | (1 << 12)));

src/add-ons/accelerants/via/engine/crtc.c

393

DACW(FP_HVALID_S, diff);

src/add-ons/accelerants/via/engine/crtc.c

394

DACW(FP_HVALID_E, ((si->ps.p1_timing.h_display - diff) - 1));

src/add-ons/accelerants/via/engine/crtc.c

502

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));

src/add-ons/accelerants/via/engine/crtc.c

523

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));

src/add-ons/accelerants/via/engine/dac.c

27

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/via/engine/dac.c

29

DACW(OUTPUT, (output & 0x0000feee));

src/add-ons/accelerants/via/engine/dac.c

33

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/via/engine/dac.c

36

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/via/engine/dac.c

38

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/via/engine/dac.c

55

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/via/engine/dac.c

58

DACW(OUTPUT, output);

src/add-ons/accelerants/via/engine/dac.c

60

DACW(TSTCTRL, dac);

src/add-ons/accelerants/via/engine/dac2.c

40

DACW(TSTDATA, ((0x2 << 30) | (0x140 << 20) | (0x140 << 10) | (0x140 << 0)));

src/add-ons/accelerants/via/engine/dac2.c

43

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/via/engine/dac2.c

61

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/via/engine/general.c

384

DACW(OUTPUT, 0x00000101);

src/add-ons/accelerants/via/engine/general.c

393

DACW(OUTPUT, 0x00000001);