headers/private/graphics/matrox/mga_macros.h

320

#define DXIR(A) (DACW(PALWTADD,MGADXI_##A),DACR(X_DATAREG))

src/add-ons/accelerants/matrox/engine/mga_dac.c

140

LOG(2,("DAC: pixrdmsk 0x%02x\n", DACR(PIXRDMSK)));

src/add-ons/accelerants/matrox/engine/mga_dac.c

162

if (DACR(PALWTADD)!=0)

src/add-ons/accelerants/matrox/engine/mga_dac.c

175

R = DACR(PALDATA);

src/add-ons/accelerants/matrox/engine/mga_dac.c

176

G = DACR(PALDATA);

src/add-ons/accelerants/matrox/engine/mga_dac.c

177

B = DACR(PALDATA);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1071

DACW(TV_SETUP, ((DACR(TV_SETUP) & ~0x00000003) | 0x01000000));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1115

DACW(TV_SETUP, ((DACR(TV_SETUP) & ~0x00000002) | 0x01000001));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

475

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

480

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

499

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

544

LOG(2,("CRTC: FP_HVALID_S reg readback: $%08x\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

545

LOG(2,("CRTC: FP_HVALID_E reg readback: $%08x\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

546

LOG(2,("CRTC: FP_VVALID_S reg readback: $%08x\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

547

LOG(2,("CRTC: FP_VVALID_E reg readback: $%08x\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

548

LOG(2,("CRTC: FP_DEBUG0 reg readback: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

549

LOG(2,("CRTC: FP_DEBUG1 reg readback: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

550

LOG(2,("CRTC: FP_DEBUG2 reg readback: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

551

LOG(2,("CRTC: FP_DEBUG3 reg readback: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

552

LOG(2,("CRTC: FP_TG_CTRL reg readback: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

633

DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | panelsync));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

676

DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | 0x20000022));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

864

DACW(NV10_CURSYNC, (DACR(NV10_CURSYNC) | 0x02000000));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

885

if (si->ps.card_arch == NV40A) DACW(CURPOS, (DACR(CURPOS)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

903

if (si->ps.card_arch == NV40A) DACW(CURPOS, (DACR(CURPOS)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

978

yhigh = ((DACR(CURPOS) & 0x0fff0000) >> 16);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

119

DACW(NV11_DITHER, (DACR(NV11_DITHER) | 0x00010000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

130

DACW(FP_DITHER, (DACR(FP_DITHER) | 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

137

DACW(NV11_DITHER, (DACR(NV11_DITHER) & ~0x00010000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

140

DACW(FP_DITHER, (DACR(FP_DITHER) & ~0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

21

output = DACR(OUTPUT);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

218

LOG(4,("DAC: current NV30_PLLSETUP settings: $%08x\n", DACR(NV30_PLLSETUP)));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

228

DACW(NV30_PLLSETUP, (DACR(NV30_PLLSETUP) & ~0x000000f0));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

23

dac = DACR(TSTCTRL);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

26

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

260

DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

279

dividers1 = DACR(PIXPLLC);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

286

dividers2 = DACR(PIXPLLC2);

src/add-ons/accelerants/nvidia/engine/nv_dac.c

44

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

49

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

54

if (DACR(TSTCTRL) & 0x10000000)

src/add-ons/accelerants/nvidia/engine/nv_dac.c

66

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

183

LOG(4,("DAC2: current NV30_PLLSETUP settings: $%08x\n", DACR(NV30_PLLSETUP)));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

193

DACW(NV30_PLLSETUP, (DACR(NV30_PLLSETUP) & ~0x000000f0));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

224

DACW(NV40_PLLSEL2, (DACR(NV40_PLLSEL2) & ~0x10000100));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

54

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

72

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1860

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeefff));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1864

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00100000));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2330

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/nvidia/engine/nv_info.c

2331

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/nvidia/engine/nv_info.c

2357

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/nvidia/engine/nv_info.c

2358

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/nvidia/engine/nv_info.c

2387

((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&

src/add-ons/accelerants/nvidia/engine/nv_info.c

2404

if (DACR(FP_TG_CTRL) & 0x80000000)

src/add-ons/accelerants/nvidia/engine/nv_info.c

2429

si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2430

si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2431

si->ps.p1_timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2433

si->ps.p1_timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2434

si->ps.p1_timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2435

si->ps.p1_timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2438

if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2439

if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2441

if (DACR(FP_TG_CTRL) & 0x10000000) si->ps.p1_timing.flags |= B_BLANK_PEDESTAL;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2472

LOG(2,("DAC1: FP_HDISPEND: %d\n", DACR(FP_HDISPEND)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2473

LOG(2,("DAC1: FP_HTOTAL: %d\n", DACR(FP_HTOTAL)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2474

LOG(2,("DAC1: FP_HCRTC: %d\n", DACR(FP_HCRTC)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2475

LOG(2,("DAC1: FP_HSYNC_S: %d\n", DACR(FP_HSYNC_S)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2476

LOG(2,("DAC1: FP_HSYNC_E: %d\n", DACR(FP_HSYNC_E)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2477

LOG(2,("DAC1: FP_HVALID_S: %d\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2478

LOG(2,("DAC1: FP_HVALID_E: %d\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2480

LOG(2,("DAC1: FP_VDISPEND: %d\n", DACR(FP_VDISPEND)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2481

LOG(2,("DAC1: FP_VTOTAL: %d\n", DACR(FP_VTOTAL)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2482

LOG(2,("DAC1: FP_VCRTC: %d\n", DACR(FP_VCRTC)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2483

LOG(2,("DAC1: FP_VSYNC_S: %d\n", DACR(FP_VSYNC_S)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2484

LOG(2,("DAC1: FP_VSYNC_E: %d\n", DACR(FP_VSYNC_E)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2485

LOG(2,("DAC1: FP_VVALID_S: %d\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2486

LOG(2,("DAC1: FP_VVALID_E: %d\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2488

LOG(2,("DAC1: FP_CHKSUM: $%08x = (dec) %d\n", DACR(FP_CHKSUM),DACR(FP_CHKSUM)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2489

LOG(2,("DAC1: FP_TST_CTRL: $%08x\n", DACR(FP_TST_CTRL)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2490

LOG(2,("DAC1: FP_TG_CTRL: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2491

LOG(2,("DAC1: FP_DEBUG0: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2492

LOG(2,("DAC1: FP_DEBUG1: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2493

LOG(2,("DAC1: FP_DEBUG2: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2494

LOG(2,("DAC1: FP_DEBUG3: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2547

if (DACR(FP_TMDS_DATA) & 0x01)

src/add-ons/accelerants/skeleton/engine/crtc.c

349

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/skeleton/engine/crtc.c

354

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/skeleton/engine/crtc.c

373

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/skeleton/engine/crtc.c

418

LOG(2,("CRTC: FP_HVALID_S reg readback: $%08x\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/skeleton/engine/crtc.c

419

LOG(2,("CRTC: FP_HVALID_E reg readback: $%08x\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/skeleton/engine/crtc.c

420

LOG(2,("CRTC: FP_VVALID_S reg readback: $%08x\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/skeleton/engine/crtc.c

421

LOG(2,("CRTC: FP_VVALID_E reg readback: $%08x\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/skeleton/engine/crtc.c

422

LOG(2,("CRTC: FP_DEBUG0 reg readback: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/skeleton/engine/crtc.c

423

LOG(2,("CRTC: FP_DEBUG1 reg readback: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/skeleton/engine/crtc.c

424

LOG(2,("CRTC: FP_DEBUG2 reg readback: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/skeleton/engine/crtc.c

425

LOG(2,("CRTC: FP_DEBUG3 reg readback: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/skeleton/engine/crtc.c

426

LOG(2,("CRTC: FP_TG_CTRL reg readback: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/skeleton/engine/crtc.c

505

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));

src/add-ons/accelerants/skeleton/engine/crtc.c

526

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));

src/add-ons/accelerants/skeleton/engine/crtc.c

801

yhigh = ((DACR(CURPOS) & 0x0fff0000) >> 16);

src/add-ons/accelerants/skeleton/engine/dac.c

20

output = DACR(OUTPUT);

src/add-ons/accelerants/skeleton/engine/dac.c

22

dac = DACR(TSTCTRL);

src/add-ons/accelerants/skeleton/engine/dac.c

25

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/skeleton/engine/dac.c

31

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/skeleton/engine/dac.c

36

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/skeleton/engine/dac.c

41

if (DACR(TSTCTRL) & 0x10000000)

src/add-ons/accelerants/skeleton/engine/dac.c

53

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/skeleton/engine/dac2.c

43

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/skeleton/engine/dac2.c

61

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/skeleton/engine/info.c

2195

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/skeleton/engine/info.c

2196

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/skeleton/engine/info.c

2222

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/skeleton/engine/info.c

2223

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/skeleton/engine/info.c

2251

((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&

src/add-ons/accelerants/skeleton/engine/info.c

2268

if (DACR(FP_TG_CTRL) & 0x80000000)

src/add-ons/accelerants/skeleton/engine/info.c

2296

si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2297

si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2298

si->ps.p1_timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2300

si->ps.p1_timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2301

si->ps.p1_timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2302

si->ps.p1_timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/skeleton/engine/info.c

2305

if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;

src/add-ons/accelerants/skeleton/engine/info.c

2306

if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;

src/add-ons/accelerants/skeleton/engine/info.c

2338

LOG(2,("DAC1: FP_HDISPEND: %d\n", DACR(FP_HDISPEND)));

src/add-ons/accelerants/skeleton/engine/info.c

2339

LOG(2,("DAC1: FP_HTOTAL: %d\n", DACR(FP_HTOTAL)));

src/add-ons/accelerants/skeleton/engine/info.c

2340

LOG(2,("DAC1: FP_HCRTC: %d\n", DACR(FP_HCRTC)));

src/add-ons/accelerants/skeleton/engine/info.c

2341

LOG(2,("DAC1: FP_HSYNC_S: %d\n", DACR(FP_HSYNC_S)));

src/add-ons/accelerants/skeleton/engine/info.c

2342

LOG(2,("DAC1: FP_HSYNC_E: %d\n", DACR(FP_HSYNC_E)));

src/add-ons/accelerants/skeleton/engine/info.c

2343

LOG(2,("DAC1: FP_HVALID_S: %d\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/skeleton/engine/info.c

2344

LOG(2,("DAC1: FP_HVALID_E: %d\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/skeleton/engine/info.c

2346

LOG(2,("DAC1: FP_VDISPEND: %d\n", DACR(FP_VDISPEND)));

src/add-ons/accelerants/skeleton/engine/info.c

2347

LOG(2,("DAC1: FP_VTOTAL: %d\n", DACR(FP_VTOTAL)));

src/add-ons/accelerants/skeleton/engine/info.c

2348

LOG(2,("DAC1: FP_VCRTC: %d\n", DACR(FP_VCRTC)));

src/add-ons/accelerants/skeleton/engine/info.c

2349

LOG(2,("DAC1: FP_VSYNC_S: %d\n", DACR(FP_VSYNC_S)));

src/add-ons/accelerants/skeleton/engine/info.c

2350

LOG(2,("DAC1: FP_VSYNC_E: %d\n", DACR(FP_VSYNC_E)));

src/add-ons/accelerants/skeleton/engine/info.c

2351

LOG(2,("DAC1: FP_VVALID_S: %d\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/skeleton/engine/info.c

2352

LOG(2,("DAC1: FP_VVALID_E: %d\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/skeleton/engine/info.c

2354

LOG(2,("DAC1: FP_CHKSUM: $%08x = (dec) %d\n", DACR(FP_CHKSUM),DACR(FP_CHKSUM)));

src/add-ons/accelerants/skeleton/engine/info.c

2355

LOG(2,("DAC1: FP_TST_CTRL: $%08x\n", DACR(FP_TST_CTRL)));

src/add-ons/accelerants/skeleton/engine/info.c

2356

LOG(2,("DAC1: FP_TG_CTRL: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/skeleton/engine/info.c

2357

LOG(2,("DAC1: FP_DEBUG0: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/skeleton/engine/info.c

2358

LOG(2,("DAC1: FP_DEBUG1: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/skeleton/engine/info.c

2359

LOG(2,("DAC1: FP_DEBUG2: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/skeleton/engine/info.c

2360

LOG(2,("DAC1: FP_DEBUG3: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/skeleton/engine/info.c

2805

DACR(PIXPLLC2), DAC2R(PIXPLLC2)));

src/add-ons/accelerants/via/engine/crtc.c

338

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) | 0x00000100));

src/add-ons/accelerants/via/engine/crtc.c

343

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/via/engine/crtc.c

362

DACW(FP_TG_CTRL, (DACR(FP_TG_CTRL) & 0xfffffeff));

src/add-ons/accelerants/via/engine/crtc.c

407

LOG(2,("CRTC: FP_HVALID_S reg readback: $%08x\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/via/engine/crtc.c

408

LOG(2,("CRTC: FP_HVALID_E reg readback: $%08x\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/via/engine/crtc.c

409

LOG(2,("CRTC: FP_VVALID_S reg readback: $%08x\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/via/engine/crtc.c

410

LOG(2,("CRTC: FP_VVALID_E reg readback: $%08x\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/via/engine/crtc.c

411

LOG(2,("CRTC: FP_DEBUG0 reg readback: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/via/engine/crtc.c

412

LOG(2,("CRTC: FP_DEBUG1 reg readback: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/via/engine/crtc.c

413

LOG(2,("CRTC: FP_DEBUG2 reg readback: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/via/engine/crtc.c

414

LOG(2,("CRTC: FP_DEBUG3 reg readback: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/via/engine/crtc.c

415

LOG(2,("CRTC: FP_TG_CTRL reg readback: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/via/engine/crtc.c

502

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));

src/add-ons/accelerants/via/engine/crtc.c

523

DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));

src/add-ons/accelerants/via/engine/dac.c

22

output = DACR(OUTPUT);

src/add-ons/accelerants/via/engine/dac.c

24

dac = DACR(TSTCTRL);

src/add-ons/accelerants/via/engine/dac.c

27

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xfffeffff));

src/add-ons/accelerants/via/engine/dac.c

33

DACW(OUTPUT, (DACR(OUTPUT) | 0x00000001));

src/add-ons/accelerants/via/engine/dac.c

38

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/via/engine/dac.c

43

if (DACR(TSTCTRL) & 0x10000000)

src/add-ons/accelerants/via/engine/dac.c

55

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/via/engine/dac2.c

43

DACW(TSTCTRL, (DACR(TSTCTRL) | 0x00001000));

src/add-ons/accelerants/via/engine/dac2.c

61

DACW(TSTCTRL, (DACR(TSTCTRL) & 0xffffefff));

src/add-ons/accelerants/via/engine/info.c

257

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/via/engine/info.c

258

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/via/engine/info.c

284

uint16 width = ((DACR(FP_HDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/via/engine/info.c

285

uint16 height = ((DACR(FP_VDISPEND) & 0x0000ffff) + 1);

src/add-ons/accelerants/via/engine/info.c

313

((DACR(FP_TG_CTRL) & 0x80000000) == (DAC2R(FP_TG_CTRL) & 0x80000000)) &&

src/add-ons/accelerants/via/engine/info.c

330

if (DACR(FP_TG_CTRL) & 0x80000000)

src/add-ons/accelerants/via/engine/info.c

358

si->ps.p1_timing.h_sync_start = (DACR(FP_HSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

359

si->ps.p1_timing.h_sync_end = (DACR(FP_HSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

360

si->ps.p1_timing.h_total = (DACR(FP_HTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

362

si->ps.p1_timing.v_sync_start = (DACR(FP_VSYNC_S) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

363

si->ps.p1_timing.v_sync_end = (DACR(FP_VSYNC_E) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

364

si->ps.p1_timing.v_total = (DACR(FP_VTOTAL) & 0x0000ffff) + 1;

src/add-ons/accelerants/via/engine/info.c

367

if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;

src/add-ons/accelerants/via/engine/info.c

368

if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;

src/add-ons/accelerants/via/engine/info.c

400

LOG(2,("DAC1: FP_HDISPEND: %d\n", DACR(FP_HDISPEND)));

src/add-ons/accelerants/via/engine/info.c

401

LOG(2,("DAC1: FP_HTOTAL: %d\n", DACR(FP_HTOTAL)));

src/add-ons/accelerants/via/engine/info.c

402

LOG(2,("DAC1: FP_HCRTC: %d\n", DACR(FP_HCRTC)));

src/add-ons/accelerants/via/engine/info.c

403

LOG(2,("DAC1: FP_HSYNC_S: %d\n", DACR(FP_HSYNC_S)));

src/add-ons/accelerants/via/engine/info.c

404

LOG(2,("DAC1: FP_HSYNC_E: %d\n", DACR(FP_HSYNC_E)));

src/add-ons/accelerants/via/engine/info.c

405

LOG(2,("DAC1: FP_HVALID_S: %d\n", DACR(FP_HVALID_S)));

src/add-ons/accelerants/via/engine/info.c

406

LOG(2,("DAC1: FP_HVALID_E: %d\n", DACR(FP_HVALID_E)));

src/add-ons/accelerants/via/engine/info.c

408

LOG(2,("DAC1: FP_VDISPEND: %d\n", DACR(FP_VDISPEND)));

src/add-ons/accelerants/via/engine/info.c

409

LOG(2,("DAC1: FP_VTOTAL: %d\n", DACR(FP_VTOTAL)));

src/add-ons/accelerants/via/engine/info.c

410

LOG(2,("DAC1: FP_VCRTC: %d\n", DACR(FP_VCRTC)));

src/add-ons/accelerants/via/engine/info.c

411

LOG(2,("DAC1: FP_VSYNC_S: %d\n", DACR(FP_VSYNC_S)));

src/add-ons/accelerants/via/engine/info.c

412

LOG(2,("DAC1: FP_VSYNC_E: %d\n", DACR(FP_VSYNC_E)));

src/add-ons/accelerants/via/engine/info.c

413

LOG(2,("DAC1: FP_VVALID_S: %d\n", DACR(FP_VVALID_S)));

src/add-ons/accelerants/via/engine/info.c

414

LOG(2,("DAC1: FP_VVALID_E: %d\n", DACR(FP_VVALID_E)));

src/add-ons/accelerants/via/engine/info.c

416

LOG(2,("DAC1: FP_CHKSUM: $%08x = (dec) %d\n", DACR(FP_CHKSUM),DACR(FP_CHKSUM)));

src/add-ons/accelerants/via/engine/info.c

417

LOG(2,("DAC1: FP_TST_CTRL: $%08x\n", DACR(FP_TST_CTRL)));

src/add-ons/accelerants/via/engine/info.c

418

LOG(2,("DAC1: FP_TG_CTRL: $%08x\n", DACR(FP_TG_CTRL)));

src/add-ons/accelerants/via/engine/info.c

419

LOG(2,("DAC1: FP_DEBUG0: $%08x\n", DACR(FP_DEBUG0)));

src/add-ons/accelerants/via/engine/info.c

420

LOG(2,("DAC1: FP_DEBUG1: $%08x\n", DACR(FP_DEBUG1)));

src/add-ons/accelerants/via/engine/info.c

421

LOG(2,("DAC1: FP_DEBUG2: $%08x\n", DACR(FP_DEBUG2)));

src/add-ons/accelerants/via/engine/info.c

422

LOG(2,("DAC1: FP_DEBUG3: $%08x\n", DACR(FP_DEBUG3)));

src/add-ons/accelerants/via/engine/info.c

874

DACR(PIXPLLC2), DAC2R(PIXPLLC2)));