src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1026

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xbf));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1059

if (!(si->ps.slaved_tmds1)) CRTCW(PIXEL, (CRTCR(PIXEL) & 0x03));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1086

if (si->ps.slaved_tmds1) CRTCW(LCD, (CRTCR(LCD) | 0x01));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1131

CRTCW(PIXEL, ((CRTCR(PIXEL) & 0xc7) | 0x80));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

1135

CRTCW(LCD, (CRTCR(LCD) & 0xfe));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

338

CRTCW(VSYNCE, (CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

360

CRTCW(VSYNCE, ((CRTCR(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

368

CRTCW(HEB, (CRTCR(HEB) & 0xe0) |

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

403

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xfb));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

405

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x04));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

441

if (!(si->ps.monitors & CRTC1_TMDS)) CRTCW(PIXEL, (CRTCR(PIXEL) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

455

LOG(2,("CRTC: FP_HTIMING reg readback: $%02x\n", CRTCR(FP_HTIMING)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

456

LOG(2,("CRTC: FP_VTIMING reg readback: $%02x\n", CRTCR(FP_VTIMING)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

595

CRTCW(PIXEL, ((CRTCR(PIXEL) & 0xfc) | viddelay));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

712

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

717

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x80));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

722

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xbf));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

727

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x40));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

752

CRTCW(REPAINT0, ((CRTCR(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

792

temp = (CRTCR(REPAINT0) & 0xe0);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

795

temp = (CRTCR(HEB) & 0x9f);

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

880

CRTCW(CURCTL0, (CRTCR(CURCTL0) | 0x01));

src/add-ons/accelerants/nvidia/engine/nv_crtc.c

898

CRTCW(CURCTL0, (CRTCR(CURCTL0) & 0xfe));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1739

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_general.c

1746

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

136

data = (CRTCR(WR_I2CBUS_0) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

143

data = (CRTCR(WR_I2CBUS_1) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

150

data = (CRTCR(WR_I2CBUS_2) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

178

if ((CRTCR(RD_I2CBUS_0) & 0x04)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

181

if ((CRTCR(RD_I2CBUS_1) & 0x04)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

184

if ((CRTCR(RD_I2CBUS_2) & 0x04)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

210

if ((CRTCR(RD_I2CBUS_0) & 0x08)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

213

if ((CRTCR(RD_I2CBUS_1) & 0x08)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

216

if ((CRTCR(RD_I2CBUS_2) & 0x08)) return true;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

388

CRTCW(I2C_LOCK ,(CRTCR(I2C_LOCK) | 0x04));

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

79

data = (CRTCR(WR_I2CBUS_0) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

86

data = (CRTCR(WR_I2CBUS_1) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

93

data = (CRTCR(WR_I2CBUS_2) & 0xf0) | 0x01;

src/add-ons/accelerants/nvidia/engine/nv_info.c

2239

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2244

LOG(2,("CRTC1: PIXEL register: $%02x\n", CRTCR(PIXEL)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2252

LOG(2,("CRTC1: LCD register: $%02x\n", CRTCR(LCD)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2255

LOG(2,("CRTC1: register $59: $%02x\n", CRTCR(0x59)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2258

LOG(2,("CRTC1: register $9f: $%02x\n", CRTCR(0x9f)));

src/add-ons/accelerants/nvidia/engine/nv_info.c

2261

slaved_for_dev1 = (CRTCR(PIXEL) & 0x80);

src/add-ons/accelerants/nvidia/engine/nv_info.c

2265

tvout1 = !(CRTCR(LCD) & 0x01);

src/add-ons/accelerants/nvidia/engine/nv_info.c

262

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_info.c

274

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_info.c

340

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/nvidia/engine/nv_info.c

352

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/crtc.c

212

CRTCW(VSYNCE, (CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/crtc.c

234

CRTCW(VSYNCE, ((CRTCR(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));

src/add-ons/accelerants/skeleton/engine/crtc.c

242

CRTCW(HEB, (CRTCR(HEB) & 0xe0) |

src/add-ons/accelerants/skeleton/engine/crtc.c

277

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xfb));

src/add-ons/accelerants/skeleton/engine/crtc.c

279

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x04));

src/add-ons/accelerants/skeleton/engine/crtc.c

315

if (!si->ps.tmds1_active) CRTCW(PIXEL, (CRTCR(PIXEL) & 0x7f));

src/add-ons/accelerants/skeleton/engine/crtc.c

329

LOG(2,("CRTC: FP_HTIMING reg readback: $%02x\n", CRTCR(FP_HTIMING)));

src/add-ons/accelerants/skeleton/engine/crtc.c

330

LOG(2,("CRTC: FP_VTIMING reg readback: $%02x\n", CRTCR(FP_VTIMING)));

src/add-ons/accelerants/skeleton/engine/crtc.c

469

CRTCW(PIXEL, ((CRTCR(PIXEL) & 0xfc) | viddelay));

src/add-ons/accelerants/skeleton/engine/crtc.c

508

CRTCW(0x59, (CRTCR(0x59) | 0x01));

src/add-ons/accelerants/skeleton/engine/crtc.c

529

CRTCW(0x59, (CRTCR(0x59) & 0xfe));

src/add-ons/accelerants/skeleton/engine/crtc.c

537

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0x7f));

src/add-ons/accelerants/skeleton/engine/crtc.c

542

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x80));

src/add-ons/accelerants/skeleton/engine/crtc.c

547

CRTCW(REPAINT1, (CRTCR(REPAINT1) & 0xbf));

src/add-ons/accelerants/skeleton/engine/crtc.c

552

CRTCW(REPAINT1, (CRTCR(REPAINT1) | 0x40));

src/add-ons/accelerants/skeleton/engine/crtc.c

565

*h = !(CRTCR(REPAINT1) & 0x80);

src/add-ons/accelerants/skeleton/engine/crtc.c

566

*v = !(CRTCR(REPAINT1) & 0x40);

src/add-ons/accelerants/skeleton/engine/crtc.c

595

CRTCW(REPAINT0, ((CRTCR(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));

src/add-ons/accelerants/skeleton/engine/crtc.c

635

temp = (CRTCR(REPAINT0) & 0xe0);

src/add-ons/accelerants/skeleton/engine/crtc.c

638

temp = (CRTCR(HEB) & 0x9f);

src/add-ons/accelerants/skeleton/engine/crtc.c

718

CRTCW(CURCTL0, (CRTCR(CURCTL0) | 0x01));

src/add-ons/accelerants/skeleton/engine/crtc.c

731

CRTCW(CURCTL0, (CRTCR(CURCTL0) & 0xfe));

src/add-ons/accelerants/skeleton/engine/general.c

449

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/info.c

2101

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/info.c

2106

LOG(2,("CRTC1: PIXEL register: $%02x\n", CRTCR(PIXEL)));

src/add-ons/accelerants/skeleton/engine/info.c

2114

LOG(2,("CRTC1: LCD register: $%02x\n", CRTCR(LCD)));

src/add-ons/accelerants/skeleton/engine/info.c

2117

LOG(2,("CRTC1: register $59: $%02x\n", CRTCR(0x59)));

src/add-ons/accelerants/skeleton/engine/info.c

2120

LOG(2,("CRTC1: register $9f: $%02x\n", CRTCR(0x9f)));

src/add-ons/accelerants/skeleton/engine/info.c

2123

slaved_for_dev1 = (CRTCR(PIXEL) & 0x80);

src/add-ons/accelerants/skeleton/engine/info.c

2127

tvout1 = !(CRTCR(LCD) & 0x01);

src/add-ons/accelerants/skeleton/engine/info.c

250

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/info.c

262

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/info.c

328

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/skeleton/engine/info.c

340

CRTC2W(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/via/engine/bes.c

49

switch (((CRTCR(MEMCLK)) & 0x70) >> 4)

src/add-ons/accelerants/via/engine/crtc.c

200

CRTCW(VSYNCE, (CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/via/engine/crtc.c

222

CRTCW(VSYNCE, ((CRTCR(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));

src/add-ons/accelerants/via/engine/crtc.c

229

CRTCW(HTIMEXT1, (CRTCR(HTIMEXT1) & 0xc8) |

src/add-ons/accelerants/via/engine/crtc.c

235

CRTCW(HTIMEXT2, (CRTCR(HTIMEXT2) & 0xf7) | ((htotal & 0x100) >> (8 - 3)));

src/add-ons/accelerants/via/engine/crtc.c

238

CRTCW(VTIMEXT_PIT, (CRTCR(VTIMEXT_PIT) & 0xe0) |

src/add-ons/accelerants/via/engine/crtc.c

318

LOG(2,("CRTC: FP_HTIMING reg readback: $%02x\n", CRTCR(FP_HTIMING)));

src/add-ons/accelerants/via/engine/crtc.c

319

LOG(2,("CRTC: FP_VTIMING reg readback: $%02x\n", CRTCR(FP_VTIMING)));

src/add-ons/accelerants/via/engine/crtc.c

505

CRTCW(0x59, (CRTCR(0x59) | 0x01));

src/add-ons/accelerants/via/engine/crtc.c

526

CRTCW(0x59, (CRTCR(0x59) & 0xfe));

src/add-ons/accelerants/via/engine/crtc.c

534

CRTCW(HTIMEXT2, (CRTCR(HTIMEXT2) & 0xef));

src/add-ons/accelerants/via/engine/crtc.c

539

CRTCW(HTIMEXT2, (CRTCR(HTIMEXT2) | 0x10));

src/add-ons/accelerants/via/engine/crtc.c

544

CRTCW(HTIMEXT2, (CRTCR(HTIMEXT2) & 0xdf));

src/add-ons/accelerants/via/engine/crtc.c

549

CRTCW(HTIMEXT2, (CRTCR(HTIMEXT2) | 0x20));

src/add-ons/accelerants/via/engine/crtc.c

559

*h = !(CRTCR(HTIMEXT2) & 0x10);

src/add-ons/accelerants/via/engine/crtc.c

560

*v = !(CRTCR(HTIMEXT2) & 0x20);

src/add-ons/accelerants/via/engine/crtc.c

586

CRTCW(VTIMEXT_PIT, (((CRTCR(VTIMEXT_PIT)) & 0x1f) | ((offset & 0x0700) >> 3)));

src/add-ons/accelerants/via/engine/general.c

456

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/via/engine/info.c

163

CRTCW(VSYNCE ,(CRTCR(VSYNCE) & 0x7f));

src/add-ons/accelerants/via/engine/info.c

168

LOG(2,("CRTC1: PIXEL register: $%02x\n", CRTCR(PIXEL)));

src/add-ons/accelerants/via/engine/info.c

176

LOG(2,("CRTC1: LCD register: $%02x\n", CRTCR(LCD)));

src/add-ons/accelerants/via/engine/info.c

179

LOG(2,("CRTC1: register $59: $%02x\n", CRTCR(0x59)));

src/add-ons/accelerants/via/engine/info.c

182

LOG(2,("CRTC1: register $9f: $%02x\n", CRTCR(0x9f)));

src/add-ons/accelerants/via/engine/info.c

185

slaved_for_dev1 = (CRTCR(PIXEL) & 0x80);

src/add-ons/accelerants/via/engine/info.c

189

tvout1 = !(CRTCR(LCD) & 0x01);