Symbol: CRTC2R
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
1037
CRTC2W(PIXEL, ((CRTC2R(PIXEL) & 0xc7) | 0x80));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
1041
CRTC2W(LCD, (CRTC2R(LCD) & 0xfe));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
324
CRTC2W(VSYNCE, (CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
346
CRTC2W(VSYNCE, ((CRTC2R(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
354
CRTC2W(HEB, (CRTC2R(HEB) & 0xe0) |
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
386
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xfb));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
388
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x04));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
424
if (!(si->ps.monitors & CRTC2_TMDS)) CRTC2W(PIXEL, (CRTC2R(PIXEL) & 0x7f));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
438
LOG(2,("CRTC2: FP_HTIMING reg readback: $%02x\n", CRTC2R(FP_HTIMING)));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
439
LOG(2,("CRTC2: FP_VTIMING reg readback: $%02x\n", CRTC2R(FP_VTIMING)));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
578
CRTC2W(PIXEL, ((CRTC2R(PIXEL) & 0xfc) | viddelay));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
693
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0x7f));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
698
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x80));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
703
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xbf));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
708
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x40));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
733
CRTC2W(REPAINT0, ((CRTC2R(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
838
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) | 0x01));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
856
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) & 0xfe));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
941
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xbf));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
974
if (!(si->ps.slaved_tmds2)) CRTC2W(PIXEL, (CRTC2R(PIXEL) & 0x03));
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
998
if (si->ps.slaved_tmds2) CRTC2W(LCD, (CRTC2R(LCD) | 0x01));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2275
CRTC2W(VSYNCE ,(CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2277
LOG(2,("CRTC2: PIXEL register: $%02x\n", CRTC2R(PIXEL)));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2278
LOG(2,("CRTC2: LCD register: $%02x\n", CRTC2R(LCD)));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2279
LOG(2,("CRTC2: register $59: $%02x\n", CRTC2R(0x59)));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2280
LOG(2,("CRTC2: register $9f: $%02x\n", CRTC2R(0x9f)));
src/add-ons/accelerants/nvidia/engine/nv_info.c
2283
slaved_for_dev2 = (CRTC2R(PIXEL) & 0x80);
src/add-ons/accelerants/nvidia/engine/nv_info.c
2287
tvout2 = !(CRTC2R(LCD) & 0x01);
src/add-ons/accelerants/skeleton/engine/crtc2.c
198
CRTC2W(VSYNCE, (CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/skeleton/engine/crtc2.c
220
CRTC2W(VSYNCE, ((CRTC2R(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));
src/add-ons/accelerants/skeleton/engine/crtc2.c
228
CRTC2W(HEB, (CRTC2R(HEB) & 0xe0) |
src/add-ons/accelerants/skeleton/engine/crtc2.c
260
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xfb));
src/add-ons/accelerants/skeleton/engine/crtc2.c
262
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x04));
src/add-ons/accelerants/skeleton/engine/crtc2.c
298
if (!si->ps.tmds2_active) CRTC2W(PIXEL, (CRTC2R(PIXEL) & 0x7f));
src/add-ons/accelerants/skeleton/engine/crtc2.c
312
LOG(2,("CRTC2: FP_HTIMING reg readback: $%02x\n", CRTC2R(FP_HTIMING)));
src/add-ons/accelerants/skeleton/engine/crtc2.c
313
LOG(2,("CRTC2: FP_VTIMING reg readback: $%02x\n", CRTC2R(FP_VTIMING)));
src/add-ons/accelerants/skeleton/engine/crtc2.c
452
CRTC2W(PIXEL, ((CRTC2R(PIXEL) & 0xfc) | viddelay));
src/add-ons/accelerants/skeleton/engine/crtc2.c
491
CRTC2W(0x59, (CRTC2R(0x59) | 0x01));
src/add-ons/accelerants/skeleton/engine/crtc2.c
512
CRTC2W(0x59, (CRTC2R(0x59) & 0xfe));
src/add-ons/accelerants/skeleton/engine/crtc2.c
520
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0x7f));
src/add-ons/accelerants/skeleton/engine/crtc2.c
525
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x80));
src/add-ons/accelerants/skeleton/engine/crtc2.c
530
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xbf));
src/add-ons/accelerants/skeleton/engine/crtc2.c
535
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x40));
src/add-ons/accelerants/skeleton/engine/crtc2.c
548
*h = !(CRTC2R(REPAINT1) & 0x80);
src/add-ons/accelerants/skeleton/engine/crtc2.c
549
*v = !(CRTC2R(REPAINT1) & 0x40);
src/add-ons/accelerants/skeleton/engine/crtc2.c
578
CRTC2W(REPAINT0, ((CRTC2R(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));
src/add-ons/accelerants/skeleton/engine/crtc2.c
680
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) | 0x01));
src/add-ons/accelerants/skeleton/engine/crtc2.c
693
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) & 0xfe));
src/add-ons/accelerants/skeleton/engine/info.c
2137
CRTC2W(VSYNCE ,(CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/skeleton/engine/info.c
2139
LOG(2,("CRTC2: PIXEL register: $%02x\n", CRTC2R(PIXEL)));
src/add-ons/accelerants/skeleton/engine/info.c
2140
LOG(2,("CRTC2: LCD register: $%02x\n", CRTC2R(LCD)));
src/add-ons/accelerants/skeleton/engine/info.c
2141
LOG(2,("CRTC2: register $59: $%02x\n", CRTC2R(0x59)));
src/add-ons/accelerants/skeleton/engine/info.c
2142
LOG(2,("CRTC2: register $9f: $%02x\n", CRTC2R(0x9f)));
src/add-ons/accelerants/skeleton/engine/info.c
2145
slaved_for_dev2 = (CRTC2R(PIXEL) & 0x80);
src/add-ons/accelerants/skeleton/engine/info.c
2149
tvout2 = !(CRTC2R(LCD) & 0x01);
src/add-ons/accelerants/via/engine/crtc2.c
198
CRTC2W(VSYNCE, (CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/via/engine/crtc2.c
220
CRTC2W(VSYNCE, ((CRTC2R(VSYNCE) & 0xf0) | (vsync_e & 0x0f)));
src/add-ons/accelerants/via/engine/crtc2.c
228
CRTC2W(HEB, (CRTC2R(HEB) & 0xe0) |
src/add-ons/accelerants/via/engine/crtc2.c
260
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xfb));
src/add-ons/accelerants/via/engine/crtc2.c
262
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x04));
src/add-ons/accelerants/via/engine/crtc2.c
298
if (!si->ps.tmds2_active) CRTC2W(PIXEL, (CRTC2R(PIXEL) & 0x7f));
src/add-ons/accelerants/via/engine/crtc2.c
312
LOG(2,("CRTC2: FP_HTIMING reg readback: $%02x\n", CRTC2R(FP_HTIMING)));
src/add-ons/accelerants/via/engine/crtc2.c
313
LOG(2,("CRTC2: FP_VTIMING reg readback: $%02x\n", CRTC2R(FP_VTIMING)));
src/add-ons/accelerants/via/engine/crtc2.c
452
CRTC2W(PIXEL, ((CRTC2R(PIXEL) & 0xfc) | viddelay));
src/add-ons/accelerants/via/engine/crtc2.c
491
CRTC2W(0x59, (CRTC2R(0x59) | 0x01));
src/add-ons/accelerants/via/engine/crtc2.c
512
CRTC2W(0x59, (CRTC2R(0x59) & 0xfe));
src/add-ons/accelerants/via/engine/crtc2.c
520
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0x7f));
src/add-ons/accelerants/via/engine/crtc2.c
525
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x80));
src/add-ons/accelerants/via/engine/crtc2.c
530
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) & 0xbf));
src/add-ons/accelerants/via/engine/crtc2.c
535
CRTC2W(REPAINT1, (CRTC2R(REPAINT1) | 0x40));
src/add-ons/accelerants/via/engine/crtc2.c
548
*h = !(CRTC2R(REPAINT1) & 0x80);
src/add-ons/accelerants/via/engine/crtc2.c
549
*v = !(CRTC2R(REPAINT1) & 0x40);
src/add-ons/accelerants/via/engine/crtc2.c
578
CRTC2W(REPAINT0, ((CRTC2R(REPAINT0) & 0x1f) | ((offset & 0x0700) >> 3)));
src/add-ons/accelerants/via/engine/crtc2.c
680
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) | 0x01));
src/add-ons/accelerants/via/engine/crtc2.c
693
CRTC2W(CURCTL0, (CRTC2R(CURCTL0) & 0xfe));
src/add-ons/accelerants/via/engine/info.c
199
CRTC2W(VSYNCE ,(CRTC2R(VSYNCE) & 0x7f));
src/add-ons/accelerants/via/engine/info.c
201
LOG(2,("CRTC2: PIXEL register: $%02x\n", CRTC2R(PIXEL)));
src/add-ons/accelerants/via/engine/info.c
202
LOG(2,("CRTC2: LCD register: $%02x\n", CRTC2R(LCD)));
src/add-ons/accelerants/via/engine/info.c
203
LOG(2,("CRTC2: register $59: $%02x\n", CRTC2R(0x59)));
src/add-ons/accelerants/via/engine/info.c
204
LOG(2,("CRTC2: register $9f: $%02x\n", CRTC2R(0x9f)));
src/add-ons/accelerants/via/engine/info.c
207
slaved_for_dev2 = (CRTC2R(PIXEL) & 0x80);
src/add-ons/accelerants/via/engine/info.c
211
tvout2 = !(CRTC2R(LCD) & 0x01);