src/add-ons/accelerants/matrox/engine/mga_dac.c

1084

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1086

CFGW(OPTION, CFGR(OPTION) & 0xfffffffc);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1088

CFGW(OPTION, CFGR(OPTION) & 0xfffffffb);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1108

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1110

temp = (CFGR(OPTION) & 0xffffff27);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1121

CFGW(OPTION, (CFGR(OPTION) & 0xfffffffb) | 0x20);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1140

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1142

CFGW(OPTION, CFGR(OPTION) & 0xfffffffc);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1144

CFGW(OPTION, CFGR(OPTION) & 0xfffffffb);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1164

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1167

temp = (CFGR(OPTION2) & 0x00383000);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1174

temp = (CFGR(OPTION) & 0xffffff27);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1184

CFGW(OPTION, (CFGR(OPTION) & 0xfffffffb) | 0x20);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1204

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1208

CFGW(OPTION, CFGR(OPTION) & 0xfffffffb);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1228

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1232

CFGW(OPTION, CFGR(OPTION) & 0xffffffbf);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1234

CFGW(OPTION, (CFGR(OPTION) & 0xfffffffb) | 0x20);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1254

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1258

CFGW(OPTION, CFGR(OPTION) & 0xfffffffb);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1281

CFGW(OPTION, CFGR(OPTION) | 0x04);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1289

CFGW(OPTION, CFGR(OPTION) & 0xffffffbf);

src/add-ons/accelerants/matrox/engine/mga_dac.c

1291

CFGW(OPTION, (CFGR(OPTION) & 0xfffffffb) | 0x20);

src/add-ons/accelerants/matrox/engine/mga_general.c

102

card_class = CFGR(CLASS) & 0xff;

src/add-ons/accelerants/matrox/engine/mga_general.c

129

LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID)));

src/add-ons/accelerants/matrox/engine/mga_general.c

22

uint32 value = CFGR(reg); \

src/add-ons/accelerants/matrox/engine/mga_general.c

325

CFGW(OPTION,CFGR(OPTION)|0x20);

src/add-ons/accelerants/matrox/engine/mga_general.c

360

CFGW(OPTION,(CFGR(OPTION)&0xFFFF8FFF) | ((si->ps.v3_mem_type & 0x04) << 10));

src/add-ons/accelerants/matrox/engine/mga_general.c

365

CFGW(OPTION2,(CFGR(OPTION2)&0xFFFFCFFF)|((si->ps.v3_mem_type & 0x01) << 12));

src/add-ons/accelerants/matrox/engine/mga_general.c

367

CFGW(OPTION2,(CFGR(OPTION2)&0xFFFFFFF0) | ((si->ps.v3_mem_type & 0xf0) >> 4));

src/add-ons/accelerants/matrox/engine/mga_general.c

379

CFGW(OPTION,(CFGR(OPTION)&0xffe07fff) | (si->ps.option_reg & 0x001f8000));

src/add-ons/accelerants/matrox/engine/mga_general.c

385

CFGW(OPTION,(CFGR(OPTION)|(1<<22)|(0<<29)));

src/add-ons/accelerants/matrox/engine/mga_general.c

427

CFGW(OPTION,CFGR(OPTION)|0x20);

src/add-ons/accelerants/matrox/engine/mga_general.c

454

if (si->ps.sdram) CFGW(OPTION,(CFGR(OPTION) & 0xffffbfff));

src/add-ons/accelerants/matrox/engine/mga_general.c

462

CFGW(OPTION,(CFGR(OPTION)&0xFFFF83FF) | ((si->ps.v3_mem_type & 0x07) << 10));

src/add-ons/accelerants/matrox/engine/mga_general.c

463

if (!si->ps.sdram) CFGW(OPTION,(CFGR(OPTION) | (0x01 << 14)));

src/add-ons/accelerants/matrox/engine/mga_general.c

465

CFGW(OPTION2,(CFGR(OPTION2)&0xFFFFCFFF)|((si->ps.v3_option2_reg & 0x03) << 12));

src/add-ons/accelerants/matrox/engine/mga_general.c

479

CFGW(OPTION,(CFGR(OPTION)&0xffe07fff) | (si->ps.option_reg & 0x001f8000));

src/add-ons/accelerants/matrox/engine/mga_general.c

485

CFGW(OPTION,(CFGR(OPTION)|(1<<22)|(0<<29)));

src/add-ons/accelerants/matrox/engine/mga_general.c

532

CFGW(OPTION,CFGR(OPTION)|0x20);

src/add-ons/accelerants/matrox/engine/mga_general.c

562

if (si->ps.sdram) CFGW(OPTION,(CFGR(OPTION) & 0xffffbfff));

src/add-ons/accelerants/matrox/engine/mga_general.c

570

CFGW(OPTION,(CFGR(OPTION)&0xFFFF83FF) | (si->ps.option_reg & 0x00001c00));

src/add-ons/accelerants/matrox/engine/mga_general.c

571

if (!si->ps.sdram) CFGW(OPTION,(CFGR(OPTION) | (0x01 << 14)));

src/add-ons/accelerants/matrox/engine/mga_general.c

585

CFGW(OPTION,(CFGR(OPTION)&0xffe07fff) | (si->ps.option_reg & 0x001f8000));

src/add-ons/accelerants/matrox/engine/mga_general.c

591

CFGW(OPTION, ((CFGR(OPTION) & 0xefbfffff) | (si->ps.option_reg & 0x10400000)));

src/add-ons/accelerants/matrox/engine/mga_general.c

651

CFGW(OPTION,CFGR(OPTION)|0x20);

src/add-ons/accelerants/matrox/engine/mga_general.c

684

CFGW(OPTION, ((CFGR(OPTION) & 0xf8400164) | (si->ps.option_reg & 0x00207e00)));

src/add-ons/accelerants/matrox/engine/mga_general.c

686

CFGW(OPTION2, ((CFGR(OPTION2) & 0xffff0200) | (si->ps.option2_reg & 0x0000fc00)));

src/add-ons/accelerants/matrox/engine/mga_general.c

69

switch(CFGR(DEVID))

src/add-ons/accelerants/matrox/engine/mga_general.c

734

CFGW(OPTION,(CFGR(OPTION)&0xffe07fff) | (si->ps.option_reg & 0x001f8000));

src/add-ons/accelerants/matrox/engine/mga_general.c

74

LOG(8,("POWERUP: Unimplemented Matrox device %08x\n",CFGR(DEVID)));

src/add-ons/accelerants/matrox/engine/mga_general.c

885

CFGW(DEVCTRL,(2|CFGR(DEVCTRL)));

src/add-ons/accelerants/matrox/engine/mga_info.c

774

si->ps.sdram = !(CFGR(OPTION) & 0x00004000);

src/add-ons/accelerants/matrox/engine/mga_info.c

814

si->ps.sdram = !(CFGR(OPTION) & 0x00004000);

src/add-ons/accelerants/matrox/engine/mga_info.c

855

si->ps.sdram = !(CFGR(OPTION) & 0x00004000);

src/add-ons/accelerants/matrox/engine/tvp3026.c

191

CFGW(DEVCTRL,(2|CFGR(DEVCTRL))); // enable device response (already enabled here!)

src/add-ons/accelerants/matrox/engine/tvp3026.c

228

option = CFGR(OPTION) & 0xffd0cfff;

src/add-ons/accelerants/matrox/engine/tvp3026.c

230

LOG(2,("mil2_dac_init: OPTION 0x%08x\n", CFGR(OPTION)));

src/add-ons/accelerants/neomagic/engine/nm_general.c

103

switch(CFGR(DEVID))

src/add-ons/accelerants/neomagic/engine/nm_general.c

151

LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID)));

src/add-ons/accelerants/neomagic/engine/nm_general.c

16

uint32 value = CFGR(reg); \

src/add-ons/accelerants/nvidia/engine/nv_agp.c

135

LOG(4,("AGP: graphics card AGPCMD register readback $%08x\n", CFGR(AGPCMD)));

src/add-ons/accelerants/nvidia/engine/nv_dac.c

362

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_dac.c

406

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

319

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_dac2.c

363

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_general.c

110

switch(CFGR(DEVID))

src/add-ons/accelerants/nvidia/engine/nv_general.c

1387

LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID)));

src/add-ons/accelerants/nvidia/engine/nv_general.c

20

uint32 value = CFGR(reg); \

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

108

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

162

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

194

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_i2c.c

51

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_info.c

1472

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) & 0xfffffffe));

src/add-ons/accelerants/nvidia/engine/nv_info.c

295

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) |= 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_info.c

3221

if ((CFGR(DEVID) & 0xfff0ffff) == 0x024010de) {

src/add-ons/accelerants/nvidia/engine/nv_info.c

3281

uint32 dev_manID = CFGR(DEVID);

src/add-ons/accelerants/nvidia/engine/nv_info.c

3312

uint32 dev_manID = CFGR(DEVID);

src/add-ons/accelerants/nvidia/engine/nv_info.c

401

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) |= 0x00000001));

src/add-ons/accelerants/nvidia/engine/nv_info.c

526

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) & 0xfffffffe));

src/add-ons/accelerants/skeleton/engine/general.c

109

LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID)));

src/add-ons/accelerants/skeleton/engine/general.c

18

uint32 value = CFGR(reg); \

src/add-ons/accelerants/skeleton/engine/general.c

99

switch(CFGR(DEVID))

src/add-ons/accelerants/skeleton/engine/info.c

1385

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) & 0xfffffffe));

src/add-ons/accelerants/skeleton/engine/info.c

283

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) |= 0x00000001));

src/add-ons/accelerants/skeleton/engine/info.c

2900

uint32 dev_manID = CFGR(DEVID);

src/add-ons/accelerants/skeleton/engine/info.c

2952

uint32 dev_manID = CFGR(DEVID);

src/add-ons/accelerants/skeleton/engine/info.c

389

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) |= 0x00000001));

src/add-ons/accelerants/skeleton/engine/info.c

514

CFGW(ROMSHADOW, (CFGR(ROMSHADOW) & 0xfffffffe));

src/add-ons/accelerants/via/engine/general.c

133

LOG(8,("POWERUP: Failed to detect valid card 0x%08x\n",CFGR(DEVID)));

src/add-ons/accelerants/via/engine/general.c

18

uint32 value = CFGR(reg); \

src/add-ons/accelerants/via/engine/general.c

99

switch(CFGR(DEVID))

src/add-ons/accelerants/via/engine/info.c

969

uint32 dev_manID = CFGR(DEVID);