Symbol: x86_write_msr
headers/private/kernel/arch/x86/arch_thread.h
50
x86_write_msr(IA32_MSR_GS_BASE, (addr_t)&t->arch_info);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
142
x86_write_msr(IA32_MSR_HV_SIMP, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
148
x86_write_msr(IA32_MSR_HV_SIEFP, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
154
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_MESSAGE, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
160
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
166
x86_write_msr(IA32_MSR_HV_SCONTROL, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
177
x86_write_msr(IA32_MSR_HV_SCONTROL, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
183
x86_write_msr(IA32_MSR_HV_SIMP, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
188
x86_write_msr(IA32_MSR_HV_SIEFP, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
194
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_MESSAGE, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
200
x86_write_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
208
x86_write_msr(IA32_MSR_HV_EOM, 0);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
65
x86_write_msr(IA32_MSR_HV_GUEST_OS_ID, IA32_MSR_HV_GUEST_OS_ID_FREEBSD);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
70
x86_write_msr(IA32_MSR_HV_HYPERCALL, msr);
src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp
87
x86_write_msr(IA32_MSR_HV_HYPERCALL, msr);
src/add-ons/kernel/cpu/x86/generic_x86.cpp
143
x86_write_msr(IA32_MSR_MTRR_DEFAULT_TYPE,
src/add-ons/kernel/cpu/x86/generic_x86.cpp
190
x86_write_msr(IA32_MSR_MTRR_DEFAULT_TYPE, defaultType);
src/add-ons/kernel/cpu/x86/generic_x86.cpp
202
x86_write_msr(IA32_MSR_MTRR_DEFAULT_TYPE, defaultType | IA32_MTRR_ENABLE);
src/add-ons/kernel/cpu/x86/generic_x86.cpp
85
x86_write_msr(IA32_MSR_MTRR_PHYSICAL_MASK_0 + index, 0);
src/add-ons/kernel/cpu/x86/generic_x86.cpp
90
x86_write_msr(IA32_MSR_MTRR_PHYSICAL_BASE_0 + index,
src/add-ons/kernel/cpu/x86/generic_x86.cpp
92
x86_write_msr(IA32_MSR_MTRR_PHYSICAL_MASK_0 + index,
src/add-ons/kernel/cpu/x86/generic_x86.cpp
96
x86_write_msr(IA32_MSR_MTRR_PHYSICAL_BASE_0 + index, 0);
src/add-ons/kernel/power/cpufreq/amd_pstates/amd_pstates.cpp
69
x86_write_msr(MSR_AMD_CPPC_ENABLE, 1);
src/add-ons/kernel/power/cpufreq/amd_pstates/amd_pstates.cpp
81
x86_write_msr(MSR_AMD_CPPC_REQ, request & 0xffffffff);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
106
x86_write_msr(IA32_MSR_PERF_CTL, pstate << 8);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
190
x86_write_msr(IA32_MSR_HWP_INTERRUPT, 0);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
191
x86_write_msr(IA32_MSR_PM_ENABLE, 1);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
215
x86_write_msr(IA32_MSR_ENERGY_PERF_BIAS, perfBias);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
219
x86_write_msr(IA32_MSR_HWP_REQUEST, hwpRequest
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
221
x86_write_msr(IA32_MSR_HWP_REQUEST_PKG, hwpRequest);
src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp
223
x86_write_msr(IA32_MSR_HWP_REQUEST, hwpRequest);
src/system/boot/platform/efi/arch/x86/arch_smp.cpp
74
x86_write_msr(IA32_MSR_APIC_ERROR_STATUS, config);
src/system/boot/platform/efi/arch/x86/arch_smp.cpp
98
x86_write_msr(IA32_MSR_APIC_INTR_COMMAND, command);
src/system/kernel/arch/x86/32/syscalls.cpp
55
x86_write_msr(IA32_MSR_SYSENTER_ESP, stackTop);
src/system/kernel/arch/x86/32/syscalls.cpp
62
x86_write_msr(IA32_MSR_SYSENTER_CS, KERNEL_CODE_SELECTOR);
src/system/kernel/arch/x86/32/syscalls.cpp
63
x86_write_msr(IA32_MSR_SYSENTER_ESP, 0);
src/system/kernel/arch/x86/32/syscalls.cpp
64
x86_write_msr(IA32_MSR_SYSENTER_EIP, (addr_t)x86_sysenter);
src/system/kernel/arch/x86/64/errata.cpp
114
x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | ((uint64)1 << 57));
src/system/kernel/arch/x86/64/errata.cpp
121
x86_write_msr(MSR_F10H_DE_CFG, x86_read_msr(MSR_F10H_DE_CFG) | (1 << 9));
src/system/kernel/arch/x86/64/errata.cpp
59
x86_write_msr(0xc0011029, x86_read_msr(0xc0011029) | 1);
src/system/kernel/arch/x86/64/errata.cpp
72
x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | ((uint64)1 << 15));
src/system/kernel/arch/x86/64/errata.cpp
83
x86_write_msr(0xc0011029, x86_read_msr(0xc0011029) | (1 << 13));
src/system/kernel/arch/x86/64/errata.cpp
89
x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | (1 << 4));
src/system/kernel/arch/x86/64/errata.cpp
99
x86_write_msr(0xc0011028, x86_read_msr(0xc0011028) | (1 << 4));
src/system/kernel/arch/x86/64/syscalls.cpp
105
x86_write_msr(IA32_MSR_SYSENTER_ESP, stackTop);
src/system/kernel/arch/x86/64/syscalls.cpp
112
x86_write_msr(IA32_MSR_SYSENTER_CS, KERNEL_CODE_SELECTOR);
src/system/kernel/arch/x86/64/syscalls.cpp
113
x86_write_msr(IA32_MSR_SYSENTER_ESP, 0);
src/system/kernel/arch/x86/64/syscalls.cpp
114
x86_write_msr(IA32_MSR_SYSENTER_EIP, (addr_t)x86_64_sysenter32_entry);
src/system/kernel/arch/x86/64/syscalls.cpp
54
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
src/system/kernel/arch/x86/64/syscalls.cpp
59
x86_write_msr(IA32_MSR_FMASK, X86_EFLAGS_INTERRUPT | X86_EFLAGS_DIRECTION
src/system/kernel/arch/x86/64/syscalls.cpp
64
x86_write_msr(IA32_MSR_LSTAR, (addr_t)x86_64_syscall_entry);
src/system/kernel/arch/x86/64/syscalls.cpp
68
x86_write_msr(IA32_MSR_CSTAR, (addr_t)x86_64_syscall32_entry);
src/system/kernel/arch/x86/64/syscalls.cpp
83
x86_write_msr(IA32_MSR_STAR, ((uint64)(USER32_CODE_SELECTOR) << 48)
src/system/kernel/arch/x86/64/thread.cpp
100
x86_write_msr(IA32_MSR_FS_BASE, thread->user_local_storage);
src/system/kernel/arch/x86/64/thread.cpp
101
x86_write_msr(IA32_MSR_KERNEL_GS_BASE, thread->arch_info.user_gs_base);
src/system/kernel/arch/x86/64/thread.cpp
159
x86_write_msr(IA32_MSR_KERNEL_GS_BASE, base);
src/system/kernel/arch/x86/apic.cpp
108
x86_write_msr(IA32_MSR_APIC_EOI, 0);
src/system/kernel/arch/x86/apic.cpp
129
x86_write_msr(IA32_MSR_APIC_LVT_LINT0, APIC_LVT_MASKED);
src/system/kernel/arch/x86/apic.cpp
130
x86_write_msr(IA32_MSR_APIC_LVT_LINT1, APIC_LVT_MASKED);
src/system/kernel/arch/x86/apic.cpp
152
x86_write_msr(IA32_MSR_APIC_SPURIOUS_INTR_VECTOR, config);
src/system/kernel/arch/x86/apic.cpp
165
x86_write_msr(IA32_MSR_APIC_INTR_COMMAND, command);
src/system/kernel/arch/x86/apic.cpp
201
x86_write_msr(IA32_MSR_APIC_LVT_TIMER, config);
src/system/kernel/arch/x86/apic.cpp
221
x86_write_msr(IA32_MSR_APIC_LVT_ERROR, config);
src/system/kernel/arch/x86/apic.cpp
241
x86_write_msr(IA32_MSR_APIC_INITIAL_TIMER_COUNT, config);
src/system/kernel/arch/x86/apic.cpp
271
x86_write_msr(IA32_MSR_APIC_TIMER_DIVIDE_CONFIG, config);
src/system/kernel/arch/x86/apic.cpp
318
x86_write_msr(IA32_MSR_APIC_BASE, apic_base
src/system/kernel/arch/x86/apic.cpp
98
x86_write_msr(IA32_MSR_APIC_TASK_PRIORITY, config);
src/system/kernel/arch/x86/arch_cpu.cpp
1025
x86_write_msr(IA32_MSR_UCODE_REV, 0);
src/system/kernel/arch/x86/arch_cpu.cpp
1147
x86_write_msr(IA32_MSR_UCODE_WRITE, data);
src/system/kernel/arch/x86/arch_cpu.cpp
1266
x86_write_msr(MSR_K8_UCODE_UPDATE, data);
src/system/kernel/arch/x86/arch_cpu.cpp
1578
x86_write_msr(IA32_MSR_TSC, 0);
src/system/kernel/arch/x86/arch_cpu.cpp
1599
x86_write_msr(K8_MSR_IPM, msr & ~K8_CMPHALT);
src/system/kernel/arch/x86/arch_cpu.cpp
1793
x86_write_msr(IA32_MSR_TSC_AUX, cpu);
src/system/kernel/arch/x86/arch_cpu.cpp
1802
x86_write_msr(MSR_F10H_DE_CFG, value | DE_CFG_SERIALIZE_LFENCE);
src/system/kernel/arch/x86/arch_cpu.cpp
338
x86_write_msr(IA32_MSR_PAT, value);
src/system/kernel/arch/x86/arch_debug.cpp
1219
x86_write_msr(IA32_MSR_GS_BASE, (addr_t)&unsetThread);
src/system/kernel/arch/x86/paging/64bit/X86PagingMethod64Bit.cpp
439
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)
src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp
183
x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)