src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBusDevice_x86.cpp

19

*_counter = x86_read_msr(IA32_MSR_HV_TIME_REF_COUNT);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

139

uint64 msr = x86_read_msr(IA32_MSR_HV_SIMP);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

145

msr = x86_read_msr(IA32_MSR_HV_SIEFP);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

152

msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_MESSAGE);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

158

msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

164

msr = x86_read_msr(IA32_MSR_HV_SCONTROL);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

175

uint64 msr = x86_read_msr(IA32_MSR_HV_SCONTROL);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

181

msr = x86_read_msr(IA32_MSR_HV_SIMP);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

186

msr = x86_read_msr(IA32_MSR_HV_SIEFP);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

192

msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_MESSAGE);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

198

msr = x86_read_msr(IA32_MSR_HV_SINT0 + VMBUS_SINT_TIMER);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

67

uint64 msr = x86_read_msr(IA32_MSR_HV_HYPERCALL);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

73

msr = x86_read_msr(IA32_MSR_HV_HYPERCALL);

src/add-ons/kernel/bus_managers/hyperv/arch/x86/VMBus_x86.cpp

85

uint64 msr = x86_read_msr(IA32_MSR_HV_HYPERCALL);

src/add-ons/kernel/cpu/x86/generic_x86.cpp

111

mtrr_capabilities capabilities(x86_read_msr(IA32_MSR_MTRR_CAPABILITIES));

src/add-ons/kernel/cpu/x86/generic_x86.cpp

133

uint64 defaultType = x86_read_msr(IA32_MSR_MTRR_DEFAULT_TYPE);

src/add-ons/kernel/cpu/x86/generic_x86.cpp

162

uint64 mask = x86_read_msr(IA32_MSR_MTRR_PHYSICAL_MASK_0 + index * 2);

src/add-ons/kernel/cpu/x86/generic_x86.cpp

166

uint64 base = x86_read_msr(IA32_MSR_MTRR_PHYSICAL_BASE_0 + index * 2);

src/add-ons/kernel/cpu/x86/generic_x86.cpp

188

uint64 defaultType = x86_read_msr(IA32_MSR_MTRR_DEFAULT_TYPE)

src/add-ons/kernel/cpu/x86/generic_x86.cpp

239

uint64 defaultType = x86_read_msr(IA32_MSR_MTRR_DEFAULT_TYPE);

src/add-ons/kernel/power/cpufreq/amd_pstates/amd_pstates.cpp

71

uint64 cap1 = x86_read_msr(MSR_AMD_CPPC_CAP1);

src/add-ons/kernel/power/cpufreq/amd_pstates/amd_pstates.cpp

98

x86_read_msr(MSR_AMD_CPPC_CAP1));

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

192

uint64 hwpRequest = x86_read_msr(IA32_MSR_HWP_REQUEST);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

193

uint64 caps = x86_read_msr(IA32_MSR_HWP_CAPABILITIES);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

212

uint64 perfBias = x86_read_msr(IA32_MSR_ENERGY_PERF_BIAS);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

246

uint64 platformInfo = x86_read_msr(IA32_MSR_PLATFORM_INFO);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

253

= max_c(x86_read_msr(IA32_MSR_TURBO_RATIO_LIMIT) & 0xff, sMaxPState);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

78

uint64 mperf = x86_read_msr(IA32_MSR_MPERF);

src/add-ons/kernel/power/cpufreq/intel_pstates/intel_pstates.cpp

79

uint64 aperf = x86_read_msr(IA32_MSR_APERF);

src/system/boot/arch/x86/arch_cpu.cpp

353

uint64 clockSpeed = x86_read_msr(0x40000022);

src/system/boot/platform/efi/arch/x86/arch_smp.cpp

114

return x86_read_msr(IA32_MSR_APIC_ID);

src/system/boot/platform/efi/arch/x86/arch_smp.cpp

125

sX2APIC = ((x86_read_msr(IA32_MSR_APIC_BASE) & IA32_MSR_APIC_BASE_X2APIC) != 0);

src/system/boot/platform/efi/arch/x86/arch_smp.cpp

64

return x86_read_msr(IA32_MSR_APIC_ERROR_STATUS);

src/system/kernel/arch/x86/64/errata.cpp

114

x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | ((uint64)1 << 57));

src/system/kernel/arch/x86/64/errata.cpp

121

x86_write_msr(MSR_F10H_DE_CFG, x86_read_msr(MSR_F10H_DE_CFG) | (1 << 9));

src/system/kernel/arch/x86/64/errata.cpp

45

const uint64 microcode = x86_read_msr(IA32_MSR_UCODE_REV);

src/system/kernel/arch/x86/64/errata.cpp

59

x86_write_msr(0xc0011029, x86_read_msr(0xc0011029) | 1);

src/system/kernel/arch/x86/64/errata.cpp

72

x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | ((uint64)1 << 15));

src/system/kernel/arch/x86/64/errata.cpp

83

x86_write_msr(0xc0011029, x86_read_msr(0xc0011029) | (1 << 13));

src/system/kernel/arch/x86/64/errata.cpp

89

x86_write_msr(0xc0011020, x86_read_msr(0xc0011020) | (1 << 4));

src/system/kernel/arch/x86/64/errata.cpp

99

x86_write_msr(0xc0011028, x86_read_msr(0xc0011028) | (1 << 4));

src/system/kernel/arch/x86/64/syscalls.cpp

54

x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)

src/system/kernel/arch/x86/apic.cpp

118

return x86_read_msr(IA32_MSR_APIC_LOGICAL_DEST);

src/system/kernel/arch/x86/apic.cpp

142

return x86_read_msr(IA32_MSR_APIC_SPURIOUS_INTR_VECTOR);

src/system/kernel/arch/x86/apic.cpp

191

return x86_read_msr(IA32_MSR_APIC_LVT_TIMER);

src/system/kernel/arch/x86/apic.cpp

211

return x86_read_msr(IA32_MSR_APIC_LVT_ERROR);

src/system/kernel/arch/x86/apic.cpp

231

return x86_read_msr(IA32_MSR_APIC_INITIAL_TIMER_COUNT);

src/system/kernel/arch/x86/apic.cpp

251

return x86_read_msr(IA32_MSR_APIC_CURRENT_TIMER_COUNT);

src/system/kernel/arch/x86/apic.cpp

261

return x86_read_msr(IA32_MSR_APIC_TIMER_DIVIDE_CONFIG);

src/system/kernel/arch/x86/apic.cpp

283

uint64 apic_base = x86_read_msr(IA32_MSR_APIC_BASE);

src/system/kernel/arch/x86/apic.cpp

316

uint64 apic_base = x86_read_msr(IA32_MSR_APIC_BASE);

src/system/kernel/arch/x86/apic.cpp

68

return x86_read_msr(IA32_MSR_APIC_ID);

src/system/kernel/arch/x86/apic.cpp

78

return x86_read_msr(IA32_MSR_APIC_VERSION);

src/system/kernel/arch/x86/apic.cpp

88

return x86_read_msr(IA32_MSR_APIC_TASK_PRIORITY);

src/system/kernel/arch/x86/arch_cpu.cpp

1029

uint64 value = x86_read_msr(IA32_MSR_UCODE_REV);

src/system/kernel/arch/x86/arch_cpu.cpp

1042

uint64 value = x86_read_msr(IA32_MSR_UCODE_REV);

src/system/kernel/arch/x86/arch_cpu.cpp

1055

uint64 platformBits = (x86_read_msr(IA32_MSR_PLATFORM_ID) >> 50) & 0x7;

src/system/kernel/arch/x86/arch_cpu.cpp

1597

uint64 msr = x86_read_msr(K8_MSR_IPM);

src/system/kernel/arch/x86/arch_cpu.cpp

1682

uint64 value = x86_read_msr(MSR_F10H_HWCR);

src/system/kernel/arch/x86/arch_cpu.cpp

1686

value = x86_read_msr(MSR_F10H_PSTATEDEF(0));

src/system/kernel/arch/x86/arch_cpu.cpp

1800

uint64 value = x86_read_msr(MSR_F10H_DE_CFG);

src/system/kernel/arch/x86/arch_cpu.cpp

1808

gCPU[cpu].arch.mperf_prev = x86_read_msr(IA32_MSR_MPERF);

src/system/kernel/arch/x86/arch_cpu.cpp

1809

gCPU[cpu].arch.aperf_prev = x86_read_msr(IA32_MSR_APERF);

src/system/kernel/arch/x86/arch_cpu.cpp

330

uint64 value = x86_read_msr(IA32_MSR_PAT);

src/system/kernel/arch/x86/arch_system_info.cpp

162

uint64 mperf2 = x86_read_msr(IA32_MSR_MPERF);

src/system/kernel/arch/x86/arch_system_info.cpp

163

uint64 aperf2 = x86_read_msr(IA32_MSR_APERF);

src/system/kernel/arch/x86/paging/64bit/X86PagingMethod64Bit.cpp

439

x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)

src/system/kernel/arch/x86/paging/pae/X86PagingMethodPAE.cpp

183

x86_write_msr(IA32_MSR_EFER, x86_read_msr(IA32_MSR_EFER)