wpi_prph_write
wpi_prph_write(sc, WPI_BSM_WR_MEM_SRC, 0);
wpi_prph_write(sc, WPI_BSM_WR_MEM_DST, WPI_FW_TEXT_BASE);
wpi_prph_write(sc, WPI_BSM_WR_DWCOUNT, size);
wpi_prph_write(sc, WPI_BSM_WR_CTRL, WPI_BSM_WR_CTRL_START);
wpi_prph_write(sc, WPI_BSM_WR_CTRL, WPI_BSM_WR_CTRL_START_EN);
wpi_prph_write(sc, WPI_BSM_DRAM_DATA_ADDR, dma->paddr);
wpi_prph_write(sc, WPI_BSM_DRAM_DATA_SIZE, fw->init.datasz);
wpi_prph_write(sc, WPI_BSM_DRAM_TEXT_ADDR,
wpi_prph_write(sc, WPI_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
wpi_prph_write(sc, WPI_BSM_DRAM_DATA_ADDR, dma->paddr);
wpi_prph_write(sc, WPI_BSM_DRAM_DATA_SIZE, fw->main.datasz);
wpi_prph_write(sc, WPI_BSM_DRAM_TEXT_ADDR,
wpi_prph_write(sc, WPI_BSM_DRAM_TEXT_SIZE,
wpi_prph_write(sc, WPI_APMG_CLK_ENA,
wpi_prph_write(sc, WPI_ALM_SCHED_MODE, 2); /* bypass mode */
wpi_prph_write(sc, WPI_ALM_SCHED_ARASTAT, 1); /* enable RA0 */
wpi_prph_write(sc, WPI_ALM_SCHED_TXFACT, 0x3f);
wpi_prph_write(sc, WPI_ALM_SCHED_SBYPASS_MODE1, 0x10000);
wpi_prph_write(sc, WPI_ALM_SCHED_SBYPASS_MODE2, 0x30002);
wpi_prph_write(sc, WPI_ALM_SCHED_TXF4MF, 4);
wpi_prph_write(sc, WPI_ALM_SCHED_TXF5MF, 5);
wpi_prph_write(sc, WPI_ALM_SCHED_MODE, 0);
wpi_prph_write(sc, WPI_ALM_SCHED_TXFACT, 0);
wpi_prph_write(sc, WPI_APMG_CLK_DIS, WPI_APMG_CLK_DMA_CLK_RQT);
wpi_prph_write(sc, addr, wpi_prph_read(sc, addr) | mask);
wpi_prph_write(sc, addr, wpi_prph_read(sc, addr) & ~mask);
wpi_prph_write(sc, addr, *data);