headers/private/graphics/matrox/mga_macros.h

308

#define MGA_REG8(r_) ((vuint8 *)regs)[(r_)]

headers/private/graphics/neomagic/nm_macros.h

302

#define NM_REG8(r_) ((vuint8 *)regs)[(r_)]

headers/private/graphics/neomagic/nm_macros.h

306

#define NM_2REG8(r_) ((vuint8 *)regs2)[(r_)]

headers/private/graphics/nvidia/nv_macros.h

888

#define NV_REG8(r_) ((vuint8 *)regs)[(r_)]

headers/private/graphics/radeon/pll_access.h

19

void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic );

headers/private/graphics/radeon/pll_access.h

24

void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic );

headers/private/graphics/radeon/pll_access.h

36

uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr );

headers/private/graphics/radeon/pll_access.h

39

void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val );

headers/private/graphics/radeon/pll_access.h

42

void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val, uint32 mask );

headers/private/graphics/skeleton/macros.h

741

#define ENG_REG8(r_) ((vuint8 *)regs)[(r_)]

headers/private/graphics/via/macros.h

804

#define ENG_REG8(r_) ((vuint8 *)regs)[(r_)]

src/add-ons/accelerants/3dfx/accelerant.h

177

#define INREG8(addr) *((vuint8*)(gInfo.regs + addr))

src/add-ons/accelerants/3dfx/accelerant.h

181

#define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val

src/add-ons/accelerants/ati/accelerant.h

236

#define INREG8(addr) *((vuint8*)(gInfo.regs + addr))

src/add-ons/accelerants/ati/accelerant.h

240

#define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val

src/add-ons/accelerants/et6x00/Acceleration.c

201

((vuint8 *)((uint32)si->memory + srcAddr))[i] = ((uint8 *)&color)[i];

src/add-ons/accelerants/intel_810/i810_regs.h

111

#define INREG8(addr) (*((vuint8*)(gInfo.regs + (addr))))

src/add-ons/accelerants/intel_810/i810_regs.h

115

#define OUTREG8(addr, val) (*((vuint8*)(gInfo.regs + (addr))) = (val))

src/add-ons/accelerants/matrox/engine/mga_crtc.c

613

vuint8 * cursor;

src/add-ons/accelerants/matrox/engine/mga_crtc.c

616

cursor = (vuint8*) si->framebuffer;

src/add-ons/accelerants/neomagic/engine/nm_crtc.c

1007

vuint8 * cursor;

src/add-ons/accelerants/neomagic/engine/nm_crtc.c

1010

cursor = (vuint8*) si->framebuffer;

src/add-ons/accelerants/radeon/SetDisplayMode.c

111

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/SetDisplayMode.c

86

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/crtc.c

22

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

119

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

150

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

172

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

198

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

240

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

59

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/dpms.c

97

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/flat_panel.c

110

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/flat_panel.c

120

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/flat_panel.c

23

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/flat_panel.c

254

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/internal_tv_out.c

129

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/internal_tv_out.c

161

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/internal_tv_out.c

233

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/internal_tv_out.c

93

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

104

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

180

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

231

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

334

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

40

vuint8 *regs = info->ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

419

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_detection.c

56

vuint8 *regs = info->ai->regs;

src/add-ons/accelerants/radeon/monitor_routing.c

29

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/monitor_routing.c

422

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/overlay.c

162

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/overlay.c

317

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/overlay.c

534

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/overlay.c

56

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/overlay.c

965

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/pll.c

457

vuint8 *regs = ai->regs;

src/add-ons/accelerants/radeon/radeon_accelerant.h

44

vuint8 *regs; // pointer to mapped registers

src/add-ons/accelerants/radeon_hd/accelerant.h

54

vuint8* regs;

src/add-ons/accelerants/s3/register_io.cpp

17

#define INREG8(addr) *((vuint8*)(gInfo.regs + addr))

src/add-ons/accelerants/s3/register_io.cpp

21

#define OUTREG8(addr, val) *((vuint8*)(gInfo.regs + addr)) = val

src/add-ons/kernel/bus_managers/pci/pci_io.cpp

84

vuint8* ptr = get_io_port_address(mapped_io_addr);

src/add-ons/kernel/bus_managers/pci/pci_io.cpp

96

vuint8* ptr = get_io_port_address(mapped_io_addr);

src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp

140

case 1: value = *(vuint8*)address; break;

src/add-ons/kernel/busses/pci/ecam/ECAMPCIController.cpp

160

case 1: *(vuint8*)address = value; break;

src/add-ons/kernel/busses/virtio/virtio_mmio/virtio_mmio.cpp

414

vuint8* src = &dev->fRegs->config[offset];

src/add-ons/kernel/busses/virtio/virtio_mmio/virtio_mmio.cpp

446

vuint8* dst = &dev->fRegs->config[offset];

src/add-ons/kernel/drivers/audio/hda/driver.h

62

vuint8* regs;

src/add-ons/kernel/drivers/graphics/3dfx/driver.cpp

67

vuint8* regs; // pointer to memory mapped registers

src/add-ons/kernel/drivers/graphics/ati/driver.cpp

161

vuint8* regs; // pointer to memory mapped registers

src/add-ons/kernel/drivers/graphics/intel_810/driver.cpp

64

vuint8* regs; // pointer to memory mapped registers

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

208

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

326

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

377

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

393

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

434

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

582

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/CP_setup.c

642

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/PCI_GART.c

283

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

629

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

647

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

885

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

924

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/irq.c

106

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/irq.c

154

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/irq.c

30

Radeon_ThreadInterruptWork(vuint8 *regs, device_info *di, uint32 int_status)

src/add-ons/kernel/drivers/graphics/radeon/irq.c

71

Radeon_HandleCaptureInterrupt(vuint8 *regs, device_info *di, uint32 cap_status)

src/add-ons/kernel/drivers/graphics/radeon/mem_controller.c

140

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/pll_access.c

16

void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic )

src/add-ons/kernel/drivers/graphics/radeon/pll_access.c

28

void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic )

src/add-ons/kernel/drivers/graphics/radeon/pll_access.c

59

uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr )

src/add-ons/kernel/drivers/graphics/radeon/pll_access.c

71

void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val )

src/add-ons/kernel/drivers/graphics/radeon/pll_access.c

84

void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr,

src/add-ons/kernel/drivers/graphics/radeon/radeon_driver.h

103

vuint8 *regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

193

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

231

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

297

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

32

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

349

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

367

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/radeon/vip.c

99

vuint8 *regs = di->regs;

src/add-ons/kernel/drivers/graphics/s3/driver.cpp

99

vuint8* regs; // pointer to memory mapped registers