t3
uint64 t3;
sd t3, \extSize + 28*8(sp)
ld t3, \extSize + 28*8(sp)
if (sched->t3 != 0 && (! is_aggr)) {
rc[3].tries = sched->t3;
s3code, sched->t3); /* series 3 */
uint8_t t3, r3; /* series 3: tries, rate code */
XMP(t2, t3), \
t2 = IMULT(t2, IC4) - t3, \
XPP(t0, t3), \
XPP(t3, t4) \
PREC t0, t1, t2, t3, t4, t5, t6, t7, t;
t3 = in[j] * quant[j];
tmpp[3 * 8] = t3;
t3 = tmp[8 * i + 3];
out[8 * i + 3] = ITOINT(t3);
uint16 t3 = kGammaTable[top[2]];
bottom[2] = kInverseGammaTable[(b3 * invAlpha + t3 * mergeAlpha) / 255];
uint16 t3 = kGammaTable[top[2]];
dest[2] = kInverseGammaTable[(b3 * invAlpha + t3 * mergeAlpha) / 255];
uint16 t3 = kGammaTable[top[2]];
bottom[2] = kInverseGammaTable[(b3 * invAlpha + t3 * mergeAlpha) / 255];
uint16 t3 = kGammaTable[top[2]];
dest[2] = kInverseGammaTable[(b3 * invAlpha + t3 * mergeAlpha) / 255];
uint16 t1, uint16 t2, uint16 t3, uint8 ta, // top components
*d3 = kInverseGammaTable[(b3 * destAlpha + t3 * ta) / 255];
*d3 = kInverseGammaTable[(b3 * alphaDest + t3 * alphaSrc) / alphaTemp];
uint8 t1, uint8 t2, uint8 t3, uint8 ta, // top components
uint16 gt3 = kGammaTable[t3];
(G.tz_is_valid ? &((*pdirlist)->u.t3) : NULL),
&((*pdirlist)->u.t3),
(*pdirlist)->u.t3.mtime));
(*pdirlist)->u.t3.mtime = dos_to_unix_time(
(*pdirlist)->u.t3.atime));
(*pdirlist)->u.t3.atime =
(*pdirlist)->u.t3.mtime;
iztimes t3; /* mtime, atime, ctime */
Te0[(t3 >> 24) ] ^
(Te4[(t3 ) & 0xff] & 0x000000ff) ^
(Te4[(t3 >> 8) & 0xff] & 0x0000ff00) ^
(Te4[(t3 >> 16) & 0xff] & 0x00ff0000) ^
(Te4[(t3 >> 24) ] & 0xff000000) ^
u32 s0, s1, s2, s3, t0, t1, t2, t3;
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[ 7];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[ 8];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[ 9];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[10];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[11];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[15];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[16];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[17];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[18];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[19];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[23];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[24];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[25];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[26];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[27];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[31];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[32];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[33];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[34];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[35];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[39];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[40];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[41];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[42];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[43];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[47];
s0 = Td0[t0 >> 24] ^ Td1[(t3 >> 16) & 0xff] ^ Td2[(t2 >> 8) & 0xff] ^ Td3[t1 & 0xff] ^ rk[48];
s1 = Td0[t1 >> 24] ^ Td1[(t0 >> 16) & 0xff] ^ Td2[(t3 >> 8) & 0xff] ^ Td3[t2 & 0xff] ^ rk[49];
s2 = Td0[t2 >> 24] ^ Td1[(t1 >> 16) & 0xff] ^ Td2[(t0 >> 8) & 0xff] ^ Td3[t3 & 0xff] ^ rk[50];
s3 = Td0[t3 >> 24] ^ Td1[(t2 >> 16) & 0xff] ^ Td2[(t1 >> 8) & 0xff] ^ Td3[t0 & 0xff] ^ rk[51];
t3 = Td0[s3 >> 24] ^ Td1[(s2 >> 16) & 0xff] ^ Td2[(s1 >> 8) & 0xff] ^ Td3[s0 & 0xff] ^ rk[55];
t3 =
Td1[(t3 >> 16) & 0xff] ^
Td2[(t3 >> 8) & 0xff] ^
Td3[(t3 ) & 0xff] ^
Td0[(t3 >> 24) ] ^
(Td4[(t3 >> 16) & 0xff] & 0x00ff0000) ^
(Td4[(t3 >> 8) & 0xff] & 0x0000ff00) ^
(Td4[(t3 ) & 0xff] & 0x000000ff) ^
(Td4[(t3 >> 24) ] & 0xff000000) ^
u32 s0, s1, s2, s3, t0, t1, t2, t3;
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[ 7];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[ 8];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[ 9];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[10];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[11];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[15];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[16];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[17];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[18];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[19];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[23];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[24];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[25];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[26];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[27];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[31];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[32];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[33];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[34];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[35];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[39];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[40];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[41];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[42];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[43];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[47];
s0 = Te0[t0 >> 24] ^ Te1[(t1 >> 16) & 0xff] ^ Te2[(t2 >> 8) & 0xff] ^ Te3[t3 & 0xff] ^ rk[48];
s1 = Te0[t1 >> 24] ^ Te1[(t2 >> 16) & 0xff] ^ Te2[(t3 >> 8) & 0xff] ^ Te3[t0 & 0xff] ^ rk[49];
s2 = Te0[t2 >> 24] ^ Te1[(t3 >> 16) & 0xff] ^ Te2[(t0 >> 8) & 0xff] ^ Te3[t1 & 0xff] ^ rk[50];
s3 = Te0[t3 >> 24] ^ Te1[(t0 >> 16) & 0xff] ^ Te2[(t1 >> 8) & 0xff] ^ Te3[t2 & 0xff] ^ rk[51];
t3 = Te0[s3 >> 24] ^ Te1[(s0 >> 16) & 0xff] ^ Te2[(s1 >> 8) & 0xff] ^ Te3[s2 & 0xff] ^ rk[55];
t3 =
Te3[(t3 ) & 0xff] ^
Te2[(t3 >> 8) & 0xff] ^
Te1[(t3 >> 16) & 0xff] ^
uint32_t t0, t1, t2, t3, t4, t5, t6, t7, t8, t9;
t3 = y3 & y6;
t4 = t3 ^ t2;
double t3 = (1 - t) * t * t * 3;
+ fPath[index + 1].point_in.x * t3
+ fPath[index + 1].point_in.y * t3
+ fPath[0].point_in.x * t3 + fPath[0].point.x * t4;
+ fPath[0].point_in.y * t3 + fPath[0].point.y * t4;
M_APM tmp0, tmp1, t2, t3, t5;
t3 = M_get_stack_var();
m_apm_round(t3, (places + 4), tmp1); /* x ^ 3 */
m_apm_multiply(t5, t2, t3); /* x ^ 5 */
m_apm_multiply(tmp1, t3, MM_5x_Twenty);
uint8 t3 = t[3];
if (t3 == 255) {
d[0] = ((t0 - d[0]) * t3 + (d[0] << 8)) >> 8;
d[1] = ((t1 - d[1]) * t3 + (d[1] << 8)) >> 8;
d[2] = ((t2 - d[2]) * t3 + (d[2] << 8)) >> 8;
#define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP3UB(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP3NRUB(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP3FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP3NRFP(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn, fpt) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP4FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn, fpt) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP5FP(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn, fpt) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP7(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP7A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP8(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP8NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP9(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP9NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP10(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP10NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
#define LP11(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, t8, v8, r8, t9, v9, r9, t10, v10, r10, t11, v11, r11, bt, bn) \
t3 _##name##_v3 = (v3); \
register t3 _n3 __asm(#r3) = _##name##_v3; \
uint64 t3;
uint64 t3;
frame->t3,
CHECK_DEBUG_VARIABLE("t3", frame->t3, true);
signalFrameData->context.uc_mcontext.x[27] = frame->t3;
frame->t3 = signalFrameData->context.uc_mcontext.x[27];
cpuState->x[27] = frame->t3;
frame->t3 = cpuState->x[27];
t3 = bit;
FPU_SUBS(d3, x3, t3);
t3 = y3 | bit;
FPU_SUBS(d3, x3, t3);
uint64_t t1,t2,t3;
t3 = xhi*yhi;
*hi = t3 + (t2>>32) + (t1 > *lo);
t3 = -3.27885410759859649565e-02, /* 0xBFA0C9A8, 0xDF35B713 */
p1 = t0+w*(t3+w*(t6+w*(t9 +w*t12))); /* parallel comp */
p1 = t0+w*(t3+w*(t6+w*(t9 +w*t12))); /* parallel comp */
t3 = -3.2788541168e-02, /* 0xbd064d47 */
t3 = kd + logc;
hi = t3 + t1;
lo = t3 - hi + t1 + t2;
double_t z, r, r2, r4, y, invc, logc, kd, hi, lo, t1, t2, t3, p;
bigtime_t t3 = sw.ElapsedTime();
CPPUNIT_ASSERT(t3 > t2);