src/add-ons/accelerants/et6x00/Acceleration.c

111

set8(mmRegs+0x8f, 0x3c, bltDir);

src/add-ons/accelerants/et6x00/Acceleration.c

194

set8(mmRegs+0x92, 0x80, 0x02); /* 4x1 source wrap */

src/add-ons/accelerants/et6x00/Acceleration.c

199

set8(mmRegs+0x92, 0x80, 0x0a); /* 3x1 source wrap */

src/add-ons/accelerants/et6x00/Acceleration.c

206

set8(mmRegs+0x9c, 0x00, 0x33); /* mask=1 always, always use FGR */

src/add-ons/accelerants/et6x00/Acceleration.c

207

set8(mmRegs+0x9f, 0x00, 0xcc); /* FGR ROP = copy of source */

src/add-ons/accelerants/et6x00/Acceleration.c

215

set8(mmRegs+0x8f, 0x18, 0x40);

src/add-ons/accelerants/et6x00/Acceleration.c

217

set8(mmRegs+0x93, 0x1a, 0x00);

src/add-ons/accelerants/et6x00/Acceleration.c

31

set8(mmRegs+0x31, 0xef, 0x10); /* let ACL to operate */

src/add-ons/accelerants/et6x00/Acceleration.c

33

set8(mmRegs+0x30, 0, 0x00);

src/add-ons/accelerants/et6x00/Acceleration.c

34

set8(mmRegs+0x30, 0, 0x01);

src/add-ons/accelerants/et6x00/Acceleration.c

36

set8(mmRegs+0x30, 0, 0x00);

src/add-ons/accelerants/et6x00/Acceleration.c

37

set8(mmRegs+0x30, 0, 0x10);

src/add-ons/accelerants/et6x00/Acceleration.c

39

set8(mmRegs+0x30, 0, 0x00);

src/add-ons/accelerants/et6x00/Acceleration.c

49

set8(mmRegs+0x31, 0xef, 0x10); /* let ACL to operate */

src/add-ons/accelerants/et6x00/Acceleration.c

50

set8(mmRegs+0x32, 0x99, 0x00); /* maximize the performance */

src/add-ons/accelerants/et6x00/Acceleration.c

51

set8(mmRegs+0x8e, 0xcf, (bpp - 1) << 4); /* set pixel color depth */

src/add-ons/accelerants/et6x00/Acceleration.c

52

set8(mmRegs+0x91, 0x80, 0x00); /* maximize the performance */

src/add-ons/accelerants/et6x00/Acceleration.c

53

set8(mmRegs+0x9d, 0x00, 0x00); /* maximize the performance */

src/add-ons/accelerants/et6x00/Acceleration.c

87

set8(mmRegs+0x92, 0x80, 0x77); /* no source wrap */

src/add-ons/accelerants/et6x00/Acceleration.c

88

set8(mmRegs+0x9c, 0x00, 0x33); /* mask=1 always, always use FGR */

src/add-ons/accelerants/et6x00/Acceleration.c

89

set8(mmRegs+0x9f, 0x00, 0xcc); /* FGR ROP = copy of source */

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

12

set8(&((volatile char *)base)[0x34], 0x7f, 0x80);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

16

set8(&((volatile char *)base)[0x34], 0x7f, 0x00);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

20

set8(&((volatile char *)base)[0x34], 0xfd, 0x02);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

24

set8(&((volatile char *)base)[0x34], 0xfd, 0x00);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

28

set8(&((volatile char *)base)[0x34], 0xfe, 0x01);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

32

set8(&((volatile char *)base)[0x34], 0xfe, 0x00);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

36

set8(&((volatile char *)base)[0x35], 0xfd, 0x02);

src/add-ons/kernel/drivers/graphics/et6x00/acl.c

40

set8(&((volatile char *)base)[0x34], 0xfe, 0x00);

src/add-ons/kernel/drivers/graphics/et6x00/bits.h

10

__inline void set8(volatile char *addr, char mask, char val);